AMD L3 cache index disable fixes for .35
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b4 am [email protected]Versions newest first
- v1 Latest5 patches 15 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/5 | x86, cacheinfo: Unify AMD L3 cache index disable checkingarch/ | +10 | 1 reply | |
| 2/5 | x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environmentsarch/ | +4 | 5 replies | |
| 3/5 | x86, cacheinfo: Reorganize AMD L3 cache structurearch/ | +32 | 1 reply | |
| 4/5 | x86, cacheinfo: Make L3 cache info per nodearch/ | +45 | 1 reply | |
| 5/5 | x86, cacheinfo: Disable index in all four subcachesarch/ | +43 | 1 reply |
Reviews trailers per patch
1 of 5 patches has a Reviewed-by or Acked-by.
| Patch | Borislav Petkov |
|---|---|
| 1/5 | |
| 2/5 | A-b A-b A-b A-b |
| 3/5 | |
| 4/5 | |
| 5/5 |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [PATCH -v2 0/5] AMD L3 cache index disable fixes for .35
From: Borislav Petkov <[email protected]>
Hi,
here's the dynamic allocation version in 4/5. The small amount of NUM_NODES * 8 Bytes is not being freed because we don't have an exit callback but I guess this is ok since we want to free it only when shutting down anyway.
-v2:
Allocate l3_caches descriptor array dynamically.
-v1:
this is a small patchset of fixes for L3 CID which have accumulated over the last couple of weeks. They serve as a preparation for disabling L3 cache indices whenever an L3 MCE triggers, has been evaluated and the offending index thresholded and, if error rate is excessively high, disabled. Those patches will be coming up later though.
Patches 1,3,4 are cleanups and unifications which save us a little bit of percpu memory in favor of dynamic allocation. Also, we have an L3 cache descriptor per node now instead of having this information per CPU.
I triggered a lockdep warning in lockdep_trace_alloc() during testing due to the fact that we may run with disabled interrupts that early in the boot process. Therefore, I have a GFP_ATOMIC in patch 3 there allocating the cache descriptors. I'm open for suggestions in case this is undesired.
Patch 2 is a fix which triggers when we run as a guest on Xen due to Xen not exporting CPU PCI config space to the guests.
And finally #5 is a required fix.
The patchset is also available atgit://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git l3-for-35
Please queue for .35,
thanks.