Nested VMX, v5
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- v1 Latest24 patches 122 repliesIn review
Changes since v4 from the cover letter
* Rebased to the current KVM tree.
* Support for lazy FPU loading.
* Implemented about 90 requests and suggestions made on the mailing list regarding the previous version of this patch set.
* Split the changes into many more, and better documented, patches.
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/24 | Move nested option from svm.c to x86.carch/ arch/ arch/ +1 more | +19 | 2 replies | |
| 2/24 | Add VMX and SVM to list of supported cpuid featuresarch/ | +3 | 2 replies | |
| 3/24 | Implement VMXON and VMXOFFarch/ | +102 | 5 replies | |
| 4/24 | Allow setting the VMXE bit in CR4arch/ | +1 | 2 replies | |
| 5/24 | Introduce vmcs12: a VMCS structure for L1arch/ | +86 | 15 replies | |
| 6/24 | Implement reading and writing of VMX MSRsarch/ arch/ | +123 | 3 replies | |
| 7/24 | Understanding guest pointers to vmcs12 structuresarch/ arch/ arch/ | +85 | 7 replies | |
| 8/24 | Hold a vmcs02 for each vmcs12arch/ | +95 | 3 replies | |
| 9/24 | Implement VMCLEARarch/ | +43 | 14 replies | |
| 10/24 | Implement VMPTRLDarch/ | +72 | 5 replies | |
| 11/24 | Implement VMPTRSTarch/ arch/ arch/ | +33 | 3 replies | |
| 12/24 | Add VMCS fields to the vmcs12arch/ | +295 | 2 replies | |
| 13/24 | Implement VMREAD and VMWRITEarch/ | +221 | 7 replies | |
| 14/24 | Prepare vmcs02 from vmcs01 and vmcs12arch/ | +403 | 3 replies | |
| 15/24 | Move register-syncing to a functionarch/ | +10 | 0 replies | |
| 16/24 | Implement VMLAUNCH and VMRESUMEarch/ | +216 | 7 replies | |
| 17/24 | No need for handle_vmx_insn function any morearch/ | +0 | 0 replies | |
| 18/24 | Exiting from L2 to L1arch/ | +277 | 12 replies | |
| 19/24 | Deciding if L0 or L1 should handle an L2 exitarch/ | +232 | 2 replies | |
| 20/24 | Correct handling of interrupt injectionarch/ | +27 | 3 replies | |
| 21/24 | Correct handling of exception injectionarch/ | +29 | 0 replies | |
| 22/24 | Correct handling of idt vectoring infoarch/ | +33 | 9 replies | |
| 23/24 | Handling of CR0.TS and #NM for Lazy FPU loadingarch/ | +102 | 0 replies | |
| 24/24 | Miscellenous small correctionsarch/ | +1 | 0 replies |
Reviews trailers per patch
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Cover letter [PATCH 0/24] Nested VMX, v5
Hi Avi,
This is a followup of our nested VMX patches that Orit Wasserman posted in December. We've addressed most of the comments and concerns that you and others on the mailing list had with the previous patch set. We hope you'll find these patches easier to understand, and suitable for applying to KVM.
The following 24 patches implement nested VMX support. The patches enable a guest to use the VMX APIs in order to run its own nested guests. I.e., it allows running hypervisors (that use VMX) under KVM. We describe the theory behind this work, our implementation, and its performance characteristics, in IBM Research report H-0282, "The Turtles Project: Design and Implementation of Nested Virtualization", available at:
http://bit.ly/a0o9te
The current patches support running Linux under a nested KVM using shadow page table (with bypass_guest_pf disabled). They support multiple nested hypervisors, which can run multiple guests. Only 64-bit nested hypervisors are supported. SMP is supported. Additional patches for running Windows under nested KVM, and Linux under nested VMware server, and support for nested EPT, are currently running in the lab, and will be sent as follow-on patchsets.
These patches were written by:
Abel Gordon, abelg <at> il.ibm.com
Nadav Har'El, nyh <at> il.ibm.com
Orit Wasserman, oritw <at> il.ibm.com
Ben-Ami Yassor, benami <at> il.ibm.com
Muli Ben-Yehuda, muli <at> il.ibm.com
With contributions by:
Anthony Liguori, aliguori <at> us.ibm.com
Mike Day, mdday <at> us.ibm.com
This work was inspired by the nested SVM support by Alexander Graf and Joerg Roedel.
Changes since v4:
* Rebased to the current KVM tree.
* Support for lazy FPU loading.
* Implemented about 90 requests and suggestions made on the mailing list regarding the previous version of this patch set.
* Split the changes into many more, and better documented, patches.
--
Nadav Har'El
IBM Haifa Research Lab