Optimize atomic efer loading
Status from this message: Applied, thanks.
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Patches in v1 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/2 | KVM: VMX: Add definitions for more vm entry/exit control bitsarch/ | +8 | 0 replies | |
| 2/2 | KVM: VMX: Optimize atomic EFER loadarch/ | +30 | 0 replies |
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Cover letter [PATCH 0/2] Optimize atomic efer loading
In some cases we resort to loading EFER via the atomic msr load on entry/exit facility. This is incredibly slow. Use the faster entry/exit LOAD_IA32_EFER controls instead, when available.
Avi Kivity (2):
KVM: VMX: Add definitions for more vm entry/exit control bits
KVM: VMX: Optimize atomic EFER load
arch/x86/include/asm/vmx.h | 8 ++++++++ arch/x86/kvm/vmx.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+), 0 deletions(-)