nVMX: Nested VMX, v11
Status from this message: Applied, thanks.
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Patches in v1 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/31 | nVMX: Keep list of loaded VMCSs, instead of vcpus.arch/ | +86 | 0 replies | |
| 2/31 | nVMX: Add "nested" module option to kvm_intelarch/ | +25 | 0 replies | |
| 3/31 | nVMX: Implement VMXON and VMXOFFarch/ | +108 | 0 replies | |
| 4/31 | nVMX: Allow setting the VMXE bit in CR4arch/ arch/ arch/ +1 more | +22 | 0 replies | |
| 5/31 | nVMX: Introduce vmcs12: a VMCS structure for L1arch/ | +75 | 0 replies | |
| 6/31 | nVMX: Implement reading and writing of VMX MSRsarch/ arch/ | +231 | 0 replies | |
| 7/31 | nVMX: Decoding memory operands of VMX instructionsarch/ arch/ arch/ | +59 | 0 replies | |
| 8/31 | nVMX: Introduce vmcs02: VMCS used to run L2arch/ | +100 | 0 replies | |
| 9/31 | nVMX: Add VMCS fields to the vmcs12arch/ | +281 | 0 replies | |
| 10/31 | nVMX: Success/failure of VMX instructions.arch/ arch/ | +69 | 0 replies | |
| 11/31 | nVMX: Implement VMCLEARarch/ arch/ | +65 | 0 replies | |
| 12/31 | nVMX: Implement VMPTRLDarch/ | +61 | 0 replies | |
| 13/31 | nVMX: Implement VMPTRSTarch/ arch/ arch/ | +33 | 0 replies | |
| 14/31 | nVMX: Implement VMREAD and VMWRITEarch/ | +191 | 0 replies | |
| 15/31 | nVMX: Move host-state field setup to a functionarch/ | +42 | 0 replies | |
| 16/31 | nVMX: Move control field setup to functionsarch/ | +47 | 0 replies | |
| 17/31 | nVMX: Prepare vmcs02 from vmcs01 and vmcs12arch/ | +279 | 0 replies | |
| 18/31 | nVMX: Implement VMLAUNCH and VMRESUMEarch/ | +63 | 0 replies | |
| 19/31 | nVMX: No need for handle_vmx_insn function any morearch/ | +0 | 0 replies | |
| 20/31 | nVMX: Exiting from L2 to L1arch/ arch/ | +266 | 0 replies | |
| 21/31 | nVMX: vmcs12 checks on nested entryarch/ arch/ | +109 | 0 replies | |
| 22/31 | nVMX: Deciding if L0 or L1 should handle an L2 exitarch/ | +252 | 0 replies | |
| 23/31 | nVMX: Correct handling of interrupt injectionarch/ | +36 | 0 replies | |
| 24/31 | nVMX: Correct handling of exception injectionarch/ | +26 | 0 replies | |
| 25/31 | nVMX: Correct handling of idt vectoring infoarch/ | +30 | 0 replies | |
| 26/31 | nVMX: Handling of CR0 and CR4 modifying instructionsarch/ | +55 | 0 replies | |
| 27/31 | nVMX: Further fixes for lazy FPU loadingarch/ | +30 | 0 replies | |
| 28/31 | nVMX: Additional TSC-offset handlingarch/ | +12 | 0 replies | |
| 29/31 | nVMX: Add VMX to list of supported cpuid featuresarch/ | +2 | 0 replies | |
| 30/31 | nVMX: Miscellenous small correctionsarch/ | +1 | 0 replies | |
| 31/31 | nVMX: DocumentationDocumentation/ | +251 | 3 replies |
Reviews trailers per patch
None of the 31 patches has a Reviewed-by or Acked-by of their own; the series has one for all of them.
| Patch | Kevin Tian |
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| Series | A-b |
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Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [PATCH 0/31] nVMX: Nested VMX, v11
Hi,
This is the eleventh iteration of the nested VMX patch set, and hopefully the last in this format.
Improvements in this version over the previous one include:
* Overhauled vmcs, cpu, and launched handling (new loaded_vmcs structure and per-cpu linked-list replacing old vcpu linked-list).
* Added missing checks that VMPTRLD was done, in emulating VMLAUNCH and some other VMX instructions.
* prepare_vmcs02 is now void, and cannot fail. Correctly handle the case of apic-access page with an invalid GPA.
* A bunch of corrections to errors and omissions discovered by Kevin Tian.
* Miscellenous function name changes, and other cosmetic improvements.
This new set of patches applies to the current KVM trunk (I checked with 5b186b275c0288c8576d26baebe9019875d68a2b).
Avi, please apply.
Nadav.
About nested VMX:
-----------------
The following 31 patches implement nested VMX support. This feature enables a guest to use the VMX APIs in order to run its own nested guests. In other words, it allows running hypervisors (that use VMX) under KVM. Multiple guest hypervisors can be run concurrently, and each of those can in turn host multiple guests.
The theory behind this work, our implementation, and its performance characteristics were presented in OSDI 2010 (the USENIX Symposium on Operating Systems Design and Implementation). Our paper was titled "The Turtles Project: Design and Implementation of Nested Virtualization", and was awarded "Jay Lepreau Best Paper". The paper is available online, at:
http://www.usenix.org/events/osdi10/tech/full_papers/Ben-Yehuda.pdf
This patch set does not include all the features described in the paper. In particular, this patch set is missing nested EPT (L1 can't use EPT and must use shadow page tables). It is also missing some features required to run VMWare hypervisors as a guest. These missing features will be sent as follow-on patchs.
Running nested VMX:
------------------
The nested VMX feature is currently disabled by default. It must be explicitly enabled with the "nested=1" option to the kvm-intel module.
No modifications are required to user space (qemu). However, qemu's default emulated CPU type (qemu64) does not list the "VMX" CPU feature, so it must be explicitly enabled, by giving qemu one of the following options:
-cpu host (emulated CPU has all features of the real CPU)
-cpu qemu64,+vmx (add just the vmx feature to a named CPU type)
This version was only tested with KVM (64-bit) as a guest hypervisor, and Linux as a nested guest.
Patch statistics:
-----------------
Documentation/kvm/nested-vmx.txt | 251 ++ arch/x86/include/asm/kvm_host.h | 2 arch/x86/include/asm/msr-index.h | 12 arch/x86/include/asm/vmx.h | 43 arch/x86/kvm/svm.c | 6 arch/x86/kvm/vmx.c | 2733 +++++++++++++++++++++++++++-- arch/x86/kvm/x86.c | 11 arch/x86/kvm/x86.h | 8 8 files changed, 2907 insertions(+), 159 deletions(-)
--
Nadav Har'El
IBM Haifa Research Lab