ARM SMMU fixes
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Cover letter [PATCH 0/2] ARM SMMU fixes
Hi Will,
Quoted 18 lines · On Wednesday 16 April 2014 15:22:06 Will Deacon wrote:
Quoted 1 line · Laurent Pinchart
Hi Will,
Hi Laurent,
Quoted 8 lines
On a different but related topic, I've written an
ipmmu-vmsa.cdriver for a Renesas IOMMU. The IP core has custom registers but uses VMSA-compatible page tables. What would you think about sharing the page table management code between the two drivers ? The biggest difference between the two implementations is that I've hardcoded the long descriptor format, while you have reused more system MMU macros that make the arm-smmu driver use 2 or 3 levels of page tables depending on whether LPAE is disabled or enabled.Actually, my driver also only supports the long-descriptor format, so the code should be shareable. Things I support that you might have issues with are:
Quoted 6 lines
- Stage-1 and Stage-2 formats (although long-descriptor only)
- 4k and 64k pages (the latter for arm64 only)
- Contiguous pte hintsDo you have support for section mappings in your driver? That is something I'd be keen to add for the ARM SMMU, but it really complicates the code.
I have pending patches for that, I still need to clean them up. I'll try to post them in the next few days and I'll CC you. Discussing the implementation will be easier with the code, so I propose resuming this thread in response to the patches.
Signature · 3 lines
Regards, Laurent Pinchart