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target-openrisc hw/openrisc: Some OpenRISC fix.

Jia Liu qemu-devel 4 versions – In review

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b4 am [email protected]

Versions newest first · linked by author and title

  1. v4 Latest3 patches 1 replyIn review
  2. v34 patches 20 repliesSuperseded
  3. v24 patches 4 repliesSuperseded
Earlier versions · 1
VersionPostedPatchesRepliesStatus
v12 patches0 repliesSuperseded

Patches in v4 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/3hw/openrisc: Indent typohw/openrisc/openrisc_sim.c+1 -10 replies
2/3hw/openrisc: Use stderr output instead of qemu_loghw/openrisc/openrisc_sim.c+2 -20 replies
3/3target-openrisc: Free typename in openrisc_cpu_class_by_nametarget-openrisc/cpu.c+1 -00 replies

Reviews trailers per patch

All 3 patches have a Reviewed-by or Acked-by of their own; the series has one for all of them.

PatchPeter MaydellAndreas Färber
SeriesR-b
1/3R-b
2/3R-b
3/3R-b

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v4 thread

Cover letter [Qemu-devel] [PATCH v4 0/3] target-openrisc hw/openrisc: Some OpenRISC fix.

Fix OpenRISC CPU and sim broad.

We should free typename in openrisc_cpu_class_by_name, and we should use stderr output in openrisc_sim.c.

Updates from V4:
* Remove a not needed patch.

Updates from V3:
* Replace a typo fix using a stderr fix.

Updates from V2:
* Combine typo patchset and typename free.

Jia Liu (3):
hw/openrisc: Indent typo
hw/openrisc: Use stderr output instead of qemu_log
target-openrisc: Free typename in openrisc_cpu_class_by_name

 hw/openrisc/openrisc_sim.c | 6 +++---
 target-openrisc/cpu.c      | 1 +
 2 files changed, 4 insertions(+), 3 deletions(-)
Signature · 1 line
1.7.12.4 (Apple Git-37)