Enable RC6/Turbo on CHV
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b4 am [email protected]Versions newest first
- v1 Latest10 patches 7 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/10 | drm/i915/bdw: Implement a basic PM interrupt handlerdrivers/ drivers/ drivers/ +1 more | +112 | 1 reply | |
| 2/10 | drm/i915: Enable PM Interrupts target via Display Interface.drivers/ drivers/ | +3 | 3 replies | |
| 3/10 | drm/i915/chv: Enable Render Standby (RC6) for Cherryviewdrivers/ drivers/ | +111 | 7 replies | |
| 4/10 | drm/i915/chv: Added CHV specific register read and writedrivers/ | +125 | 1 reply | |
| 5/10 | drm/i915/chv: Streamline CHV forcewake stuffdrivers/ | +66 | 0 replies | |
| 6/10 | drm/i915/chv: Enable RPS (Turbo) for Cherryviewdrivers/ drivers/ drivers/ +1 more | +120 | 0 replies | |
| 7/10 | drm/i915/chv: CHV doesn't need WaRsForcewakeWaitTC0drivers/ | +2 | 0 replies | |
| 8/10 | drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHVdrivers/ | +4 | 0 replies | |
| 9/10 | drm/i915/chv: Added CHV specific DDR fetch into init_clock_gatingdrivers/ | +11 | 0 replies | |
| 10/10 | drm/i915/chv: Freq(opcode) request for CHV.drivers/ drivers/ drivers/ | +11 | 2 replies |
Reviews trailers per patch
7 of 10 patches have a Reviewed-by or Acked-by.
| Patch | Ben Widawsky | Mika Kuoppala | Ville Syrjälä |
|---|---|---|---|
| 1/10 | |||
| 2/10 | R-b | ||
| 3/10 | A-b A-b A-b | R-b R-b | |
| 4/10 | |||
| 5/10 | R-b | ||
| 6/10 | |||
| 7/10 | R-b | ||
| 8/10 | R-b | ||
| 9/10 | A-b | ||
| 10/10 | R-b R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 3 reviewers.
Cover letter [PATCH 00/10] Enable RC6/Turbo on CHV
From: Deepak S <[email protected]>
Squashed some of the patches and created a new patch series. Addressed review comments on most of the patches.
Ben Widawsky (1):
drm/i915/bdw: Implement a basic PM interrupt handler
Deepak S (7):
drm/i915: Enable PM Interrupts target via Display Interface. drm/i915/chv: Enable Render Standby (RC6) for Cherryview drm/i915/chv: Added CHV specific register read and write drm/i915/chv: Streamline CHV forcewake stuff drm/i915/chv: Enable RPS (Turbo) for Cherryview drm/i915/chv: Added CHV specific DDR fetch into init_clock_gating drm/i915/chv: Freq(opcode) request for CHV.
Ville Syrjälä (2):
drm/i915/chv: CHV doesn't need WaRsForcewakeWaitTC0 drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV
drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/i915_irq.c | 84 ++++++++++- drivers/gpu/drm/i915/i915_reg.h | 17 +++ drivers/gpu/drm/i915/intel_drv.h | 2 + drivers/gpu/drm/i915/intel_pm.c | 259 ++++++++++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_sideband.c | 15 ++ drivers/gpu/drm/i915/intel_uncore.c | 146 ++++++++++++++++--- 7 files changed, 491 insertions(+), 34 deletions(-)
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