RFC Make unknown semihosting calls non-fatal
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b4 am [email protected]Versions newest first
- v1 RFC Latest14 patches 8 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/14 | Make unknown semihosting calls non-fataltarget-arm/ | +3 | 2 replies | |
| 2/14 | Added semihosting support for A64 in full-system modeinclude/ target-arm/ target-arm/ +4 more | +174 | 1 reply | |
| 3/14 | Fix makefileMakefile | +5 | 0 replies | |
| 4/14 | Modify load exclusive/store exclusive to use physical addresses with the monitortarget-arm/ target-arm/ target-arm/ | +47 | 1 reply | |
| 5/14 | Fixed TLB invalidate ops.target-arm/ | +30 | 0 replies | |
| 6/14 | Added support for block profiling for AArch32 and Aarch64Makefile.objs bbv_profiler.c bbv_profiler.h +9 more | +850 | 0 replies | |
| 7/14 | Add PMU to ARM virt platformhw/ target-arm/ target-arm/ +2 more | +32 | 0 replies | |
| 8/14 | Add instruction-counting infrastructure to target-arminclude/ target-arm/ target-arm/ +2 more | +67 | 0 replies | |
| 9/14 | Implement remaining PMU functionalitytarget-arm/ target-arm/ target-arm/ +2 more | +425 | 5 replies | |
| 10/14 | bbvec: Move mode/PID change detection to register writestarget-arm/ target-arm/ target-arm/ +3 more | +43 | 0 replies | |
| 11/14 | Print bbvec stats on 'magic' exceptionsbbv_profiler.c bbv_profiler.h target-arm/ +1 more | +38 | 0 replies | |
| 12/14 | bbvec: Detect mode changes after uncached_cpsr updatetarget-arm/ | +3 | 0 replies | |
| 13/14 | Enable negative icount values for QEMU.cpus.c target-arm/ | +27 | 0 replies | |
| 14/14 | bbvec: Properly detect conditional thumb2 branching instructionstarget-arm/ | +261 | 0 replies |
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