clk: tegra30: init PLL_C to sane rate
Status from this message: Applied, thanks.
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Patches in v1 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/2 | clk: tegra30: init PLL_C to sane ratedrivers/ | +1 | 2 replies | |
| 2/2 | clk: tegra30: fix PLL_U post divider and init ratedrivers/ | +6 | 1 reply |
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