spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible
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- v2 Latest posting 3/31 of 2 patches 0 repliesNew
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Patches in v2 posting 3/3 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/2 | spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible | +0 | 8 replies |
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