Adreno A6xx system cache support
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- v1 Latest4 of 5 patches 8 repliesIn review
4 of 5 patches are in this archive. The cover letter announces 5.
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/5 | drm/msm: rearrange the gpu_rmw() functiondrivers/ drivers/ drivers/ | +10 | 1 reply | |
| 2/5 | arm64:dts:sdm845: Add support for GPU LLCCarch/ | +6 | 3 replies | |
| 3/5 | drm/msm/adreno: Add registers in the GPU CX domaindrivers/ | +4 | 1 reply | |
| 5/5 | drm/msm/A6xx: Add support for using system cache(llc)drivers/ drivers/ drivers/ +1 more | +186 | 3 replies |
Reviews trailers per patch
All 4 patches have a Reviewed-by or Acked-by of their own; the series has one for all of them.
| Patch | Jordan Crouse |
|---|---|
| Series | R-b |
| 1/5 | R-b |
| 2/5 | R-b |
| 3/5 | R-b |
| 5/5 | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [PATCH 0/5] Adreno A6xx system cache support
Some hardware variants contain a system level cache or the last level cache(llc). This cache is typically a large block which is shared by multiple clients on the SOC. GPU uses the system cache to cache both the GPU data buffers(like textures) as well the SMMU pagetables. This helps with improved render performance as well as lower power consumption by reducing the bus traffic to the system memory.
The system cache architecture allows the cache to be split into slices which then be used by multiple SOC clients. This patch series is an effort to enable and use two of those slices perallocated for the GPU, one for the GPU data buffers and another for the GPU SMMU hardware pagetables.
This patchseries depends on the core llcc driver which was submitted to the mailing list: https://patchwork.kernel.org/patch/10184935/ and SMMU support for upstream hint which will be posted to the lists soon by Vivek.
Sharat Masetty (5):
drm/msm: rearrange the gpu_rmw() function arm64:dts:sdm845: Add support for GPU LLCC drm/msm/adreno: Add registers in the GPU CX domain drm/msm: Pass mmu features to generic layers drm/msm/A6xx: Add support for using system cache(llc)
arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 +- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a6xx.xml.h | 4 + drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 162 +++++++++++++++++++++++++++++++- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 9 ++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 4 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 2 +- drivers/gpu/drm/msm/msm_drv.c | 8 ++ drivers/gpu/drm/msm/msm_drv.h | 1 + drivers/gpu/drm/msm/msm_gpu.c | 6 +- drivers/gpu/drm/msm/msm_gpu.h | 6 +- drivers/gpu/drm/msm/msm_iommu.c | 13 +++ drivers/gpu/drm/msm/msm_mmu.h | 16 ++++ 15 files changed, 231 insertions(+), 14 deletions(-)
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1.9.1
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