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Disable SW irqbalance/irqaffinity for E7520/E7320/E7525

Suresh Siddha lkml 1 version In review

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  1. v1 Latest2 patches 10 repliesIn review

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/2Disable SW irqbalance/irqaffinity for E7520/E7320/E7525arch/x86_64/kernel/io_apic.c arch/x86_64/kernel/smpboot.c include/asm-x86_64/hw_irq.h +1 more+38 -50 replies
2/2Disable SW irqbalance/irqaffinity for E7520/E7320/E7525arch/i386/kernel/io_apic.c arch/i386/kernel/irq.c arch/x86_64/kernel/irq.c +2 more+64 -40 replies

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Cover letter [Patch 0/2] Disable SW irqbalance/irqaffinity for E7520/E7320/E7525

As part of the workaround for the "Interrupt message re-ordering across hub interface" errata (page #16 in
http://developer.intel.com/design/chipsets/specupdt/30288402.pdf),
BIOS may enable hardware IRQ balancing for Lindenhurst/Tumwater based chipset platforms. Software based irq_balance/irq_affinity should be disabled if hardware IRQ balancing is enabled.

This is applicable for chipsets with PCI id's

E7520, 0x3590
E7320, 0x3592
E7525, 0x359E

and with revision ID 0x09 and below.

Patch is broken into two parts.

1/2 - Set TARGET_CPUS on x86_64 to cpu_online_map. This brings the code inline with x86 mach-default
2/2 - Add pci quirks to disable irq_balance/affinity based on the above information and make sure destination cpus in IO-APIC redirection table entries are set to cpu_online_map

Signed-off-by Suresh Siddha <[email protected]>

Read the cover letter in its thread