RFC x86_emulator: emulate shld and shrd instruction
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b4 am 20081103160036.499cb482@frecb000711Versions newest first
- v1 RFC Latest5 patches 7 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/5 | x86_emulator: Extend the opcode descriptorarch/ | +4 | 0 replies | |
| 2/5 | x86_emulator: add Src2 decode setarch/ arch/ | +30 | 0 replies | |
| 3/5 | x86_emulator: add a new "implied 1" Src decode typearch/ | +5 | 0 replies | |
| 4/5 | x86_emulator: add the assembler code for three operandsarch/ | +29 | 6 replies | |
| 5/5 | x86_emulator: add the emulation of shld and shrd instructionsarch/ | +15 | 0 replies |
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Cover letter [RFC Patch 0/5] x86_emulator: emulate shld and shrd instruction
This series of patches emulate instructions shld and shrd. As those instructions have three operands we introduce a decode set for the Src2 operand. By doing this, the opcode descriptor needs to be extend to 32 bit.
So this series of patches:
[1/5] extend the opcode descriptor to 32 bits [2/5] add Src2 decode set
[3/5] add a new "implied 1" Src decode type [4/5] add the assembler code for three operands [5/5] add the emulation of shld and shrd instructions