Trace Clock v4
Get series with b4
b4 am [email protected]Versions newest first
- v1 Latest17 patches 2 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/17 | get_cycles() : kconfig HAVE_GET_CYCLESinit/ | +10 | 0 replies | |
| 2/17 | get_cycles() : x86 HAVE_GET_CYCLESarch/ arch/ | +13 | 0 replies | |
| 3/17 | get_cycles() : sparc64 HAVE_GET_CYCLESarch/ arch/ arch/ | +21 | 0 replies | |
| 4/17 | get_cycles() : powerpc64 HAVE_GET_CYCLESarch/ arch/ | +12 | 0 replies | |
| 5/17 | MIPS : export hpt frequency for get_cyclesarch/ arch/ | +3 | 0 replies | |
| 6/17 | get_cycles() : MIPS HAVE_GET_CYCLES_32arch/ arch/ | +29 | 0 replies | |
| 7/17 | Trace clock coreinit/ kernel/ kernel/ | +294 | 0 replies | |
| 8/17 | Trace clock genericinclude/ include/ init/ +2 more | +185 | 0 replies | |
| 9/17 | Powerpc : Trace clockarch/ arch/ | +48 | 0 replies | |
| 10/17 | Sparc64 : Trace clockarch/ arch/ | +44 | 0 replies | |
| 11/17 | LTTng timestamp sharch/ arch/ arch/ | +65 | 0 replies | |
| 12/17 | LTTng - TSC synchronicity testDocumentation/ init/ kernel/ +1 more | +325 | 0 replies | |
| 13/17 | x86 : remove arch-specific tsc_sync.carch/ arch/ arch/ +1 more | +10 | 0 replies | |
| 14/17 | MIPS use tsc_sync.carch/ arch/ | +27 | 0 replies | |
| 15/17 | MIPS create empty sync_core()arch/ | +6 | 0 replies | |
| 16/17 | MIPS : Trace clockarch/ arch/ arch/ +2 more | +260 | 0 replies | |
| 17/17 | x86 trace clockarch/ arch/ arch/ +1 more | +329 | 2 replies |
Reviews trailers per patch
2 of 17 patches have a Reviewed-by or Acked-by.
| Patch | David S. Miller |
|---|---|
| 1/17 | |
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| 3/17 | A-b |
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| 10/17 | A-b |
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| 17/17 |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [patch 00/17] Trace Clock v4
Hi Ingo,
Can we give it a try in -tip ?
This tracer clock infrastructure is rebased against current -tip and includes the comments received in the previous posts. MIPS should be tested carefully, because this patchset adds TSC synchronicity test to the architecture and I don't have any MIPS board to test (I rely on the LTTng community for that).
Mathieu
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Mathieu Desnoyers OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68