synchronized TSC between vcpu's on SMP guests
Status from this message: Applied, thanks.
Get series with b4
b4 am [email protected]Versions newest first
Patches in v1 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/3 | QEMU/KVM: x86: separate TSC load from kvm_arch_load_regsqemu/ qemu/ qemu/ | +27 | 1 reply | |
| 2/3 | QEMU/KVM: BIOS: revert TSC zeroingbios/ bios/ | +0 | 0 replies | |
| 3/3 | KVM: VMX: initialize TSC offset relative to vm creation timearch/ arch/ arch/ | +8 | 5 replies |
Reviews trailers per patch
No Reviewed-by, Acked-by or Tested-by trailers for v1 yet.
Cover letter [patch 0/3] synchronized TSC between vcpu's on SMP guests
Most Intel hosts are supposed to have their TSC's synchronized. This patchset attempts to fix the sites which overwrite the TSC making them appear unsynchronized to the guest.