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ATS capability support for Intel IOMMU

Yu Zhao kvm 6 versions – In review

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Versions newest first · linked by author and title

  1. v5 Latest6 patches 4 repliesIn review
  2. v4 posting 2/26 patches 3 repliesSuperseded
  3. v4 posting 1/26 patches 5 repliesSuperseded
Earlier versions · 3
VersionPostedPatchesRepliesStatus
v36 patches13 repliesSuperseded
v26 patches3 repliesSuperseded
v16 patches1 replySuperseded

Changes in v5 from the cover letter

1, rebase to the latest IOMMU tree

Patches in v5 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/6PCI: support the ATS capabilitydrivers/pci/iov.c drivers/pci/pci.h include/linux/pci.h +1 more+154 -00 replies
2/6PCI: handle Virtual Function ATS enablingdrivers/pci/iov.c drivers/pci/pci.h+55 -150 replies
3/6VT-d: parse ATSR in DMA Remapping Reporting Structuredrivers/pci/dmar.c include/linux/dmar.h include/linux/intel-iommu.h+116 -60 replies
4/6VT-d: add device IOTLB invalidation supportdrivers/pci/dmar.c include/linux/intel-iommu.h+82 -90 replies
5/6VT-d: cleanup iommu_flush_iotlb_psi and flush_unmapsdrivers/pci/intel-iommu.c+17 -210 replies
6/6VT-d: support the device IOTLBdrivers/pci/intel-iommu.c include/linux/dma_remapping.h include/linux/intel-iommu.h+102 -94 replies

Reviews trailers per patch

2 of 6 patches have a Reviewed-by or Acked-by.

PatchJesse Barnes
1/6A-b
2/6A-b
3/6
4/6
5/6
6/6

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v5 thread

Cover letter [PATCH v5 0/6] ATS capability support for Intel IOMMU

This patch series implements Address Translation Service support for the Intel IOMMU. The PCIe Endpoint that supports ATS capability can request the DMA address translation from the IOMMU and cache the translation itself. This can alleviate IOMMU TLB pressure and improve the hardware performance in the I/O virtualization environment.

The ATS is one of PCI-SIG I/O Virtualization (IOV) Specifications. The spec can be found at: http://www.pcisig.com/specifications/iov/ats/
(it requires membership).

Changelog:
v4 -> v5
1, rebase to the latest IOMMU tree
v3 -> v4
1, coding style fixes (Grant Grundler)
2, support the Virtual Function ATS capability

v2 -> v3
1, throw error message if VT-d hardware detects invalid descriptor
on Queued Invalidation interface (David Woodhouse)
2, avoid using pci_find_ext_capability every time when reading ATS
Invalidate Queue Depth (Matthew Wilcox)

v1 -> v2
added 'static' prefix to a local LIST_HEAD (Andrew Morton)

Yu Zhao (6):
PCI: support the ATS capability
PCI: handle Virtual Function ATS enabling
VT-d: parse ATSR in DMA Remapping Reporting Structure
VT-d: add device IOTLB invalidation support
VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps
VT-d: support the device IOTLB

 drivers/pci/dmar.c            |  189 ++++++++++++++++++++++++++++++++++++++---
 drivers/pci/intel-iommu.c     |  141 +++++++++++++++++++++++++------
 drivers/pci/iov.c             |  155 ++++++++++++++++++++++++++++++++--
 drivers/pci/pci.h             |   39 +++++++++
 include/linux/dma_remapping.h |    1 +
 include/linux/dmar.h          |    9 ++
 include/linux/intel-iommu.h   |   16 +++-
 include/linux/pci.h           |    2 +
 include/linux/pci_regs.h      |   10 ++
 9 files changed, 514 insertions(+), 48 deletions(-)