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OMAP clock/powerdomain/SDRC patches for post-2.6.30

Paul Walmsley linux-omap lkml 1 version In review

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  1. v1 Latest10 patches 9 repliesIn review

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/10OMAP3 clock: remove wait for DPLL3 M2 clock to stabilizearch/arm/mach-omap2/sram34xx.S+0 -30 replies
2/10OMAP3 clock: initialize SDRC timings at kernel startarch/arm/mach-omap2/clock34xx.c arch/arm/mach-omap2/io.c+38 -30 replies
3/10OMAP3 clock: add a short delay when lowering CORE clk ratearch/arm/mach-omap2/clock34xx.c arch/arm/mach-omap2/sram34xx.S arch/arm/plat-omap/include/mach/sram.h +1 more+44 -180 replies
4/10OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock changearch/arm/mach-omap2/clock34xx.c arch/arm/mach-omap2/sram34xx.S arch/arm/plat-omap/include/mach/sram.h +1 more+14 -80 replies
5/10OMAP3 SRAM: add more comments on the SRAM codearch/arm/mach-omap2/sram34xx.S+24 -210 replies
6/10OMAP3 SRAM: convert SRAM code to use macros rather than magic numbersarch/arm/mach-omap2/sram34xx.S+38 -150 replies
7/10OMAP3: Add support for DPLL3 divisor values higher than 2arch/arm/mach-omap2/clock34xx.c arch/arm/mach-omap2/sram34xx.S arch/arm/plat-omap/include/mach/sram.h +1 more+15 -140 replies
8/10OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLLarch/arm/mach-omap2/sram34xx.S+12 -00 replies
9/10OMAP3 clock: GPIO de-bounce clocks don't affect module idle statearch/arm/mach-omap2/clock34xx.h+6 -60 replies
10/10OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisonsarch/arm/mach-omap2/clock.c arch/arm/mach-omap2/powerdomain.c+2 -20 replies

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Cover letter [PATCH 00/10] OMAP clock/powerdomain/SDRC patches for post-2.6.30

Hello Russell,

here is the next set of OMAP clock patches for review for the post-2.6.30 merge window. They apply on top of the previous set ("OMAP clock/SDRC patches on v2.6.30-rc5"). If you're happy with these patches, Tony will queue them up into his for-next branch.

This series completes basic support for OMAP3 CORE DVFS. A few other minor bugs are fixed by the off-by-one patch and the GPIO debounce clock patch.

regards,

- Paul

---

Paul Walmsley (8):
OMAP3 clock: GPIO de-bounce clocks don't affect module idle state OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL
OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers OMAP3 SRAM: add more comments on the SRAM code
OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change OMAP3 clock: add a short delay when lowering CORE clk rate OMAP3 clock: initialize SDRC timings at kernel start OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize

Roel Kluin (1):
OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisons

Tero Kristo (1):
OMAP3: Add support for DPLL3 divisor values higher than 2

 arch/arm/mach-omap2/clock.c            |    2 
 arch/arm/mach-omap2/clock34xx.c        |   42 ++++++++--
 arch/arm/mach-omap2/clock34xx.h        |   12 +--
 arch/arm/mach-omap2/io.c               |   38 +++++++++
 arch/arm/mach-omap2/powerdomain.c      |    2 
 arch/arm/mach-omap2/sram34xx.S         |  129 +++++++++++++++++++++-----------
 arch/arm/plat-omap/include/mach/sram.h |    6 +
 arch/arm/plat-omap/sram.c              |    8 +-
 8 files changed, 171 insertions(+), 68 deletions(-)