RFC perf pmu interface -v2
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- v1 RFC Latest11 patches 44 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/11 | perf, x86: Fix Nehalem PMU quirkarch/ | +1 | 0 replies | |
| 2/11 | perf: Fix argument of perf_arch_fetch_caller_regsinclude/ | +1 | 0 replies | |
| 3/11 | perf, sparc64: Fix maybe_change_configuration() PCR setting.arch/ | +1 | 0 replies | |
| 4/11 | perf: deconstify struct pmuarch/ arch/ arch/ +5 more | +38 | 0 replies | |
| 5/11 | perf: register pmu implementationsarch/ arch/ arch/ +6 more | +450 | 5 replies | |
| 6/11 | perf: Unindent labelskernel/ | +24 | 0 replies | |
| 7/11 | perf: Reduce perf_disable() usagearch/ arch/ arch/ +3 more | +37 | 0 replies | |
| 8/11 | perf: Per PMU disablearch/ arch/ arch/ +5 more | +99 | 2 replies | |
| 9/11 | perf: Default PMU opskernel/ | +36 | 12 replies | |
| 10/11 | perf: Shrink hw_perf_eventinclude/ kernel/ | +6 | 1 reply | |
| 11/11 | perf: Rework the PMU methodsarch/ arch/ arch/ +10 more | +489 | 3 replies |
Reviews trailers per patch
3 of 11 patches have a Reviewed-by or Acked-by.
| Patch | Frederic Weisbecker |
|---|---|
| 1/11 | |
| 2/11 | A-b |
| 3/11 | |
| 4/11 | |
| 5/11 | |
| 6/11 | |
| 7/11 | |
| 8/11 | |
| 9/11 | |
| 10/11 | A-b |
| 11/11 | A-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [RFC][PATCH 00/11] perf pmu interface -v2
These patches prepare the perf code for multiple pmus (no user interface yet, Lin Ming is working on that). These patches remove all weak functions and rework the struct pmu interface.
The patches are boot tested on x86_64 and compile tested on: powerpc (!fsl, what config is that?), sparc and arm (sorry no SH compiler)
On x86 perf stat and record with both software and hardware events still worked.
I changed all (hardware) pmu implementations so there's a fair chance I messed something up, please have a look at it.
If people agree with this, I'll continue with the per-pmu context stuff I talked about last time, which should get us the hardware write batching back.