USB and cache related fixes
Get series with b4
b4 am [email protected]Versions newest first
- v1 Latest0 of 4 patches 0 repliesNew
Patches in v1 No applies recorded yet
None of the 4 patches the cover letter announces are in this archive.
Reviews trailers per patch
No Reviewed-by, Acked-by or Tested-by trailers for v1 yet.
Cover letter [U-Boot] [PATCH 0/4] USB and cache related fixes
Dear Tom Rini,
Quoted 15 lines · Marek Vasut
Quoted 14 lines
Dear Tom Rini,
Quoted 5 lines
Hey all,
In commit b8adb12 the cache flushing behavior was changed for the EHCI stack. This change showed a few different problems on TI platforms (where our cacheline size is 64 not 32).
Good thing, it made a bug surface ;-)
Quoted 3 lines
First, the
dcache_offcall that
ehci-omap had been doing was now not happening soon enough to paper over the cache issues.
Quoted 5 lines
Quoted 2 lines
Hm, is the
dcache_off()call implemented properly so nothing is lost when you shut off the cache btw?As best I can tell, yes. It will do a
dcache_flush_all()and then set the correct bits.
Ok, good
Best regards,
Marek Vasut