Add I2C support for Allwinner SoCs
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v4 Latest posting 2/20 of 9 patches 0 repliesNew
- v4 posting 1/20 of 9 patches 0 repliesSuperseded
- v2 posting 2/20 of 7 patches 0 repliesSuperseded
Earlier versions · 2
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v2 posting 1/2 | 0 of 7 patches | 0 replies | Superseded | |
| v1 | 0 of 6 patches | 0 replies | Superseded |
Patches in v4 posting 2/2 No applies recorded yet
None of the 9 patches the cover letter announces are in this archive.
Reviews trailers per patch
No Reviewed-by, Acked-by or Tested-by trailers for v4 yet.
Cover letter [PATCHv4 0/9] Add I2C support for Allwinner SoCs
Quoted 8 lines · Maxime Ripard
The Marvell and Allwinner controllers share the exact same logic (which is definitely not trivial), based on a finite state machine that triggers interrupts at each change of state, each state being a state in the I2C protocol (like address sent, data received with an ACK, etc.).
The weird thing is that the only difference between the two controllers is the register offsets, and that's it. The state numbers, bit index, etc, are exactly the same.
Ok, cool. Great someone noticed!
Quoted 1 line
So yes, I think they both licensed the same IP.
I wonder if it's the Mentor Graphics Inventra mi2c block, which would make sense given that Allwinner also uses musb.
Arnd