ARM: sun7i/sun6i: irqchip: Irqchip driver for NMI controller
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- v8 Latest0 of 3 patches 0 repliesNew
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Earlier versions · 2
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v4 | 2 of 3 patches | 1 reply | Superseded | |
| v3 | 3 patches | 0 replies | Superseded |
Patches in v8 No applies recorded yet
None of the 3 patches the cover letter announces are in this archive.
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Cover letter [PATCH v8 0/3] ARM: sun7i/sun6i: irqchip: Irqchip driver for NMI controller
Quoted 22 lines · Carlo Caione
Allwinner A20/A31 SoCs have a special interrupt controller for managing NMI. Three register are present to (un)mask, control and acknowledge NMI. These two patches add a new irqchip driver in cascade with GIC.
Changes since v1:
- added binding documentChanges since v2:
- fixed trigger type in DTS
- new explanations in binding documentation
- added support for A31 (sun6i)Changes since v3:
- changed compatiblesChanges since v4:
- fixed binding documentationChanges since v5:
- switched tohandle_fasteoi_irqhandler to avoid the double interrupts issue
Quoted 7 lines
Changes since v6:
- changed node name
- deleted defaulted interrupt-parent propertyChanges since v7:
- fixed IRQ number in sun6i
- NMI disabled before registering the IRQ handler
As far as I know, these patches have been merged already. Please send followup patches to avoid having to drop merged patches.
Maxime
Signature · 10 lines
Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140327/3ed73aa1/attachment.sig>