arm64: handle heterogeneous system register values
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v4 Latest posting 2/22 of 5 patches 0 repliesNew
- v4 posting 1/23 of 5 patches 0 repliesSuperseded
- v23 of 4 patches 0 repliesSuperseded
2 of 5 patches are in this archive. The cover letter announces 5.
Patches in v4 posting 2/2 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 5/5 | arm64: cpuinfo: print info for all CPUs | +0 | 1 reply | |
| 5/5 | arm64: cpuinfo: print info for all CPUs | +0 | 6 replies |
Reviews trailers per patch
No Reviewed-by, Acked-by or Tested-by trailers for v4 yet.
Cover letter [PATCHv4 0/5] arm64: handle heterogeneous system register values
Quoted 10 lines · Mark Rutland
Quoted 9 lines · Catalin Marinas
Quoted 5 lines · Mark Rutland
Mark Rutland (5):
arm64: addMIDR_EL1field accessors
arm64: cpuinfo: record cpu system register values
arm64: cachetype: report weakest cache policy
arm64: add runtime system sanity checksFor these 4 patches:
Quoted 8 lines
Quoted 1 line
Reviewed-by Catalin Marinas <[email protected]>Thanks.
I take it you'll pick these up directly and apply the tags from you and Will?
Or would you prefer I place these in a branch?
We'll grab them later today, I expect. If testing explodes, I'll let you know ;)
Will