powerpc8xx: Further optimisation of TLB handling
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- v5 Latest posting 2/25 patches 0 repliesNew
- v5 posting 1/25 patches 1 replySuperseded
- v45 patches 0 repliesSuperseded
Earlier versions · 3
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v3 | 11 patches | 6 replies | Superseded | |
| v2 | 11 patches | 5 replies | Superseded | |
| v1 | 11 patches | 9 replies | Superseded |
Patches in v5 posting 2/2 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/5 | powerpc/8xx: macro for handling CPU15 errataarch/ | +12 | 0 replies | |
| 2/5 | powerpc/8xx: Handle CR out of exception PROLOG/EPILOGarch/ | +7 | 0 replies | |
| 3/5 | powerpc/8xx: dont save CR in SCRATCH registersarch/ | +15 | 0 replies | |
| 4/5 | powerpc/8xx: Use SPRG2 instead of DAR for saving r3arch/ | +4 | 0 replies | |
| 5/5 | powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000arch/ | +19 | 0 replies |
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Cover letter [PATCH RESEND v5 0/5] powerpc8xx: Further optimisation of TLB handling
This patchset provides a further optimisation of TLB handling in the 8xx. Changes are:
- Not saving registers like CR when not needed
- Adding support to any TASK_SIZE
Only the last patch of the set is changed compared to v4
Resending with proper From: this time.
Christophe Leroy (5):
powerpc/8xx: macro for handling CPU15 errata powerpc/8xx: Handle CR out of exception PROLOG/EPILOG powerpc/8xx: dont save CR in SCRATCH registers powerpc/8xx: Use SPRG2 instead of DAR for saving r3 powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000
arch/powerpc/kernel/head_8xx.S | 79 +++++++++++++++++++++++++++--------------- 1 file changed, 51 insertions(+), 28 deletions(-)
Signature · 1 line
2.1.0