Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

Quoted 80 lines · Thierry Reding

Quoted 79 lines · Jan Kiszka

Quoted 77 lines · Thierry Reding

Quoted 58 lines · Jan Kiszka

Quoted 57 lines · Thierry Reding

Quoted 55 lines · Jan Kiszka

Changes in v4:
- rebased over master
- implemented psci_get_cpu_id as weak function
- implemented psci_disable/enable_smp as weak functions
- adjusted register interface of psci_get_cpu_stack_top

This version (+ the non-cached memory init fix) can also be found at
https://github.com/siemens/u-boot/tree/jetson-tk1-v5.

Jan

CC Ian Campbell <[email protected]>

CC Marc Zyngier <[email protected]>

Ian Campbell (3):
tegra124: Add more registers to struct mc_ctlr
jetson-tk1: Add PSCI configuration options and reserve secure code
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0

Jan Kiszka (11):
sun7i: Remove duplicate call to psci_arch_init
ARM: Factor out common psci_get_cpu_id
ARM: Factor out reusable psci_cpu_off_common
ARM: Factor out reusable psci_cpu_entry
ARM: Factor out reusable psci_get_cpu_stack_top
ARM: Put target PC for PSCI CPU_ON on per-CPU stack
virt-dt: Allow reservation of secure region when in a RAM carveout
tegra: Make tegra_powergate_power_on public
tegra: Add ap_pm_init hook
tegra124: Add PSCI support for Tegra124
tegra: Set CNTFRQ for secondary CPUs

 arch/arm/cpu/armv7/psci.S                   | 121 ++++++++++++++++++++++++++++
 arch/arm/cpu/armv7/sunxi/psci.S             | 112 ++++---------------------
 arch/arm/cpu/armv7/virt-dt.c                |  29 +++++++
 arch/arm/cpu/armv7/virt-v7.c                |   5 ++
 arch/arm/include/asm/arch-tegra/ap.h        |   5 ++
 arch/arm/include/asm/arch-tegra/powergate.h |   1 +
 arch/arm/include/asm/arch-tegra124/flow.h   |   6 ++
 arch/arm/include/asm/arch-tegra124/mc.h     |  35 +++++++-
 arch/arm/include/asm/armv7.h                |   1 +
 arch/arm/include/asm/system.h               |   1 +
 arch/arm/lib/bootm-fdt.c                    |   5 ++
 arch/arm/mach-tegra/Makefile                |   4 +
 arch/arm/mach-tegra/ap.c                    |  15 ++++
 arch/arm/mach-tegra/powergate.c             |   2 +-
 arch/arm/mach-tegra/psci.S                  | 114 ++++++++++++++++++++++++++
 arch/arm/mach-tegra/tegra124/Kconfig        |   2 +
 arch/arm/mach-tegra/tegra124/Makefile       |   4 +
 arch/arm/mach-tegra/tegra124/ap.c           |  55 +++++++++++++
 board/nvidia/common/board.c                 |   4 +
 include/configs/jetson-tk1.h                |   5 ++
 20 files changed, 428 insertions(+), 98 deletions(-)
 create mode 100644 arch/arm/mach-tegra/psci.S
 create mode 100644 arch/arm/mach-tegra/tegra124/ap.c

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For the series:

Reviewed-by Thierry Reding <[email protected]>

Tested-by Thierry Reding <[email protected]>

Thanks for all feedback - what's next? Anything missing? Should I rebase (didn't check yet if that is necessary) and resend?

One of the things that I'm unsure about is that we need a couple of patches in the kernel to keep systems working with these U-Boot patches applied. The cpuidle driver needs to be disabled if PSCI is enabled (I have a patch to do that). And there are a couple of other things that U-Boot needs to do before switching to non-secure mode (enabling the SMMU because that can't be done in non-secure mode).

So unconditionally enabling this is going to cause breakage in current kernels. Perhaps a solution would be to get all the code in place but not update the configuration just yet.

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Isn't there ARMV7_VIRT, "Enable support for hardware virtualization", to control this already?

Well yeah, but I think that currently gets enabled by default.

No problem, will flip the default. I'll also finally give your SMMU patch a try, provided I find a proper test case Linux-wise.