x86, perf, cqm: Cleanups and preparation for RDT/CAT
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b4 am [email protected]Versions newest first
- v1 Latest6 patches 11 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/6 | x86, perf, cqm: Document PQR MSR abusearch/ | +13 | 1 reply | |
| 2/6 | x86, perf, cqm: Use proper data typearch/ include/ | +3 | 2 replies | |
| 3/6 | x86, perf, cqm: Remove pointless spinlock from state cachearch/ | +6 | 3 replies | |
| 4/6 | x86, perf, cqm: Avoid pointless msr writearch/ | +5 | 1 reply | |
| 5/6 | x86, perf, cqm: Remove useless wrapper functionarch/ | +1 | 1 reply | |
| 6/6 | x86, perf, cqm: Add storage for closid and cleanup struct intel_pqr_statearch/ | +27 | 2 replies |
Reviews trailers per patch
5 of 6 patches have a Reviewed-by or Acked-by.
| Patch | Matt Fleming | Kanaka Juvva |
|---|---|---|
| 1/6 | A-b | |
| 2/6 | ||
| 3/6 | A-b | T-b |
| 4/6 | A-b | |
| 5/6 | A-b | |
| 6/6 | A-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [patch 0/6] x86, perf, cqm: Cleanups and preparation for RDT/CAT
While reviewing the RDT/CAT patches I had to look into the perf CQM code. As usual when my review mood reaches the grumpiness level, I start to poke around in the code some more and find stuff which really sucks.
Here is a step by step patch series, which cleans up and clarifies the code and prepares it for reuasage of the PQR cache for the RDT/CAT stuff.
Compile tested only.
Shameless hint @Intel: I have no access to a box with CQM/RDT :)
Thanks,
tglx