Skip to content

dcache support for Raspberry Pi 1

Albert ARIBAUD u-boot 1 version New

Get series with b4
b4 am 20150706093940.22ac123b@lilith

Versions newest first

  1. v1 Latest0 of 5 patches 0 repliesNew

Patches in v1 No applies recorded yet

None of the 5 patches the cover letter announces are in this archive.

Reviews trailers per patch

No Reviewed-by, Acked-by or Tested-by trailers for v1 yet.

Read the v1 thread

Cover letter [U-Boot] [PATCH 0/5] dcache support for Raspberry Pi 1

Hello Alexander,

Quoted 3 lines · Alexander Stein

dcache supprt increases the MMC read performance on RPI 1 from 5,4 MiB/s to 12.3 MiB/s. It doesn't seem to have any affect on RPI 2 though. I just get error messages about non-cacheline aligned address upon invalidation.

Could it be that code needed to support dcache is not the same for rpi_2's bcm2836 than it is for rpi's bcm2835?

Anyway: if code properly handles unaligned addresses then it should not throw an error message about it. Can you look into why the error is thrown?

Quoted 13 lines

The performance stucks at 1.2 MiB/s.

This was tested by the following command:

Quoted 1 line

fatload mmc 0:1 ${kernel_addr_r} zImage

Alexander Stein (5):
arm1176/cpu: Match cache_flush to arm1136 arm1176/cpu: Add icache and dcache support arm1176/cpu: Align cache flushing addresses to cacheline size arm/mach-bcm283x/mbox: Flush and invalidate dcache when using fw
mailbox
arm/rpi: Enable dcache

Quoted 8 lines
 arch/arm/cpu/arm1176/cpu.c   | 114 +++++++++++++++++++++++++++++++++++++++++--
 arch/arm/mach-bcm283x/mbox.c |   6 +++
 include/configs/rpi-common.h |   1 -
 3 files changed, 116 insertions(+), 5 deletions(-)
Signature · 1 line
2.4.5

Amicalement,

Signature · 1 line
Albert.