arm: socfpga: arria10: more a10 enablement
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- v1 Latest6 patches 0 repliesNew
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/6 | arm: socfpga: wrap system manager functions for A5/C5 devices | +0 | 0 replies | |
| 2/6 | arm: socfpga: add reset manager defines for Arria10 | +0 | 0 replies | |
| 3/6 | arm: socfpga: arria10: update dwmac reset function to support Arria10 | +0 | 0 replies | |
| 4/6 | arm: socfpga: arria10: don't build GEN5 sdram for arria10 | +0 | 0 replies | |
| 5/6 | arm: socfpga: arria10 fpga does not have bridges mapped | +0 | 0 replies | |
| 6/6 | arm: socfpga: arria10: remove board_init and s_init | +0 | 0 replies |
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Cover letter [U-Boot] [PATCH 0/6] arm: socfpga: arria10: more a10 enablement
Quoted 9 lines · dinguyen at opensource.altera.com
From: Dinh Nguyen <[email protected]>
Hi,
This is another round of patches for the Arria10 device. There are still some build failures that related to the clocking, FPGA manager, and bridge support.
Thanks,
I only have minor nitpicks about 2/6 and 3/6, otherwise applied, thanks!
Best regards,
Marek Vasut