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RFC Add PL330 DMA support on SoCFPGA

Dinh Nguyen u-boot 2 versions – New

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  1. v2 RFC Latest3 patches 0 repliesNew
  2. v1 RFC4 patches 0 repliesSuperseded

Patches in v2 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/3drivers: dma: Add the ARM PL330 DMA driverarch/arm/include/asm/pl330.h drivers/dma/Kconfig drivers/dma/Makefile +1 more+1052 -01 reply
2/3arm: socfpga: scrub the SDRAM to properly enable ECC supportarch/arm/mach-socfpga/include/mach/sdram.h arch/arm/mach-socfpga/spl.c arch/arm/mach-socfpga/wrap_sdram_config.c +1 more+44 -00 replies
3/3arm: socfpga: Add reset manager defines for reset statusarch/arm/mach-socfpga/include/mach/reset_manager.h+21 -00 replies

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1 of 3 patches has a Reviewed-by or Acked-by.

PatchSimon Glass
1/3R-b
2/3
3/3

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v2 thread

Cover letter [U-Boot] [RFC v2 0/3] Add PL330 DMA support on SoCFPGA

Hello,

I'm seeking advice on debugging on what is happening when I use the PL330 DMA controller to transfer zero's to the SDRAM and the effect of memory barriers.

Here are my current observations:

1) With commit "a78cd8613204 ARM: Rework and correct barrier definitions", the correct memory barrier calls are in place. With this patch in place, this version of the PL330 DMA driver can correctly transfer zero's to the SDRAM.

However, after the transfer is done, I'm encountering this error on SPL boot up:
Trying to boot from MMC1
spl: could not find mmc device. error: -19
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

The above error can be narrowed down to the list_emtpy(&uc->dev_head) in uclass_find_device() being true. A simple revert of patch a78cd8613204 make this error go away.

2) I've tried to replace all the readl/writel with raw_readl/raw_writel in the pl330 driver. Same error.

3) Removing the __iormb and __iowmb in readl/writel, effectively, removing the barriers. Error goes away.

I don't know enough what affect the barriers are having on the DMA memory transfer, so any guidance would be greatly appreciated.

Thanks,
Dinh

Dinh Nguyen (3):
drivers: dma: Add the ARM PL330 DMA driver
arm: socfpga: scrub the SDRAM to properly enable ECC support
arm: socfpga: Add reset manager defines for reset status

 arch/arm/include/asm/pl330.h                       | 105 +++
 arch/arm/mach-socfpga/include/mach/reset_manager.h |  21 +
 arch/arm/mach-socfpga/include/mach/sdram.h         |   2 +
 arch/arm/mach-socfpga/spl.c                        |   8 +
 arch/arm/mach-socfpga/wrap_sdram_config.c          |  32 +
 configs/socfpga_cyclone5_defconfig                 |   2 +
 drivers/dma/Kconfig                                |   4 +
 drivers/dma/Makefile                               |   1 +
 drivers/dma/pl330.c                                | 942 +++++++++++++++++++++
 9 files changed, 1117 insertions(+)
 create mode 100644 arch/arm/include/asm/pl330.h
 create mode 100644 drivers/dma/pl330.c
Signature · 1 line
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