ARM SMMU per-context TLB sync
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b4 am [email protected]Versions newest first
- v1 Latest2 of 4 patches 0 repliesNew
2 of 4 patches are in this archive. The cover letter announces 4.
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/4 | iommu/arm-smmu: Handle size mismatches better | +0 | 0 replies | |
| 4/4 | iommu/arm-smmu: Use per-context TLB sync as appropriate | +0 | 1 reply |
Reviews trailers per patch
No Reviewed-by, Acked-by or Tested-by trailers for v1 yet.
Cover letter [PATCH 0/4] ARM SMMU per-context TLB sync
Quoted 7 lines · Robin Murphy
The discussion around context-level access for Qualcomm SMMUs reminded me to dig up this patch I started ages ago and finish it off. As it's ended up, it's now a mini-series, with some new preparatory cleanup manifesting as patches 2 and 3. Patch 1 is broken out of patch 3 for clarity as somewhat of a fix in its own right, in that it's really an entirely unrelated thing which came up in parallel, but happens to be inherent to code I'm touching here anyway.
Apart from the first patch, most of this is looking good. Please can you respin the series without the first patch and with my comments addressed?
Cheers,
Will