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powerpc/64s/radix TLB flush fixes and performance improvements

Nicholas Piggin linuxppc-dev 3 versions – Applied

Status from this message: Applied to powerpc next, thanks.

Get series with b4
b4 am [email protected]

Versions newest first · linked by author and title

  1. v2 Latest posting 2/27 patches 5 repliesApplied
  2. v2 posting 1/20 of 7 patches 0 repliesSuperseded
  3. v1 RFC5 of 7 patches 4 repliesSuperseded

Patches in v2 posting 2/2 Applied

#Subject and filesSizeRepliesApplied
1/7powerpc/64s/radix: tlbie improve preempt handlingarch/powerpc/mm/tlb-radix.c+24 -260 replies
2/7powerpc/64s/radix: Fix process table entry cache invalidationarch/powerpc/include/asm/mmu_context.h arch/powerpc/mm/mmu_context_book3s64.c arch/powerpc/mm/tlb-radix.c+29 -60 replies
3/7powerpc/64s/radix: optimize TLB range flush barriersarch/powerpc/mm/tlb-radix.c+32 -91 reply
4/7powerpc/64s/radix: Implement _tlbie(l)_va_range flush functionsarch/powerpc/mm/tlb-radix.c+41 -301 reply
5/7powerpc/64s/radix: Optimize flush_tlb_rangearch/powerpc/mm/tlb-radix.c+101 -381 reply
6/7powerpc/64s/radix: Introduce local single page ceiling for TLB range flusharch/powerpc/mm/tlb-radix.c+19 -41 reply
7/7powerpc/64s/radix: Improve TLB flushing for page table freeingarch/powerpc/mm/tlb-radix.c+61 -291 reply

Reviews trailers per patch

2 of 7 patches have a Reviewed-by or Acked-by.

PatchAneesh Kumar K.V
1/7R-b
2/7R-b
3/7
4/7
5/7
6/7
7/7

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v2 thread

Cover letter [PATCH v2 0/7] powerpc/64s/radix TLB flush fixes and performance improvements

Resending, sorry for the noise.

Since the v1/RFC, I pulled the first 2 fix patches into this series, and rediffed to powerpc merge branch. Dropped the final 2 patches which were not completely agreed upon and baked.

Thanks,
Nick

Nicholas Piggin (7):
powerpc/64s/radix: tlbie improve preempt handling powerpc/64s/radix: Fix process table entry cache invalidation powerpc/64s/radix: optimize TLB range flush barriers powerpc/64s/radix: Implement _tlbie(l)_va_range flush functions powerpc/64s/radix: Optimize flush_tlb_range powerpc/64s/radix: Introduce local single page ceiling for TLB range
flush
powerpc/64s/radix: Improve TLB flushing for page table freeing

 arch/powerpc/include/asm/mmu_context.h |   4 +
 arch/powerpc/mm/mmu_context_book3s64.c |  25 ++-
 arch/powerpc/mm/tlb-radix.c            | 318 ++++++++++++++++++++++++---------
 3 files changed, 256 insertions(+), 91 deletions(-)
Signature · 1 line
2.15.0

Read the cover letter in its thread