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Marvell NAND controller rework with ->exec_op()

Miquel RAYNAL linux-arm-kernel linux-devicetree linux-mtd 1 version New

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  1. v1 Latest0 of 12 patches 0 repliesNew

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Cover letter [PATCH 00/12] Marvell NAND controller rework with ->exec_op()

Hello Robert,

Quoted 7 lines · On Tue, 09 Jan 2018 08:57:59 +0100 Robert Jarzmik <[email protected]>…

Boris Brezillon <[email protected]> writes:

Ok I recovered my NAND.

For the next try, I'd like you to provide another "temporary patch" to disable BBT actual writing, just to be sure. Once the driver is working properly, I'll make another try without the temporary patch.

The best way to do it is to avoid using the BBT at all, and while I was looking for the right line to comment in the Zylonite's board file I found out that the boolean flash_bbt is not actually set and then I remembered an old mail from you, then you should:

----->8-----

arch/arm/mach-pxa/zylonite.c +0 -0
index 0534949d63f6..d247ef01dc62 100644
@@ -378,6 +378,8 @@ static struct mtd_partition

zylonite_nand_partitions[] = { static struct pxa3xx_nand_platform_data
zylonite_nand_info = { .parts = zylonite_nand_partitions,
.nr_parts = ARRAY_SIZE(zylonite_nand_partitions),
- .flash_bbt = 1,

	.keep_config	= 1,

};

static void __init zylonite_init_nand(void)
-----8<-----

Then, do not forget to resize the partition that stores the BBT to remove the last 4 erase blocks from it to avoid UBI/UBIFS smashing it.

Then you should be fine.

You can test this branch (updated with last version I sent earlier):
https://github.com/miquelraynal/linux/tree/marvell/nand-next/nfc

Thanks,
Miqu?l