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powerpc/64s/radix pte manipulation optimisations

Nicholas Piggin linuxppc-dev 1 version New

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  1. v1 Latest3 patches 0 repliesNew

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#Subject and filesSizeRepliesApplied
1/3powerpc/64s/radix: make ptep_get_and_clear_full non-atomic for the full casearch/powerpc/include/asm/book3s/64/radix.h+2 -80 replies
2/3powerpc/64s/radix: avoid ptesync after set_pte and ptep_set_access_flagsarch/powerpc/include/asm/book3s/64/radix.h+0 -20 replies
3/3powerpc/64s/radix: optimise pte_updatearch/powerpc/include/asm/book3s/64/radix.h arch/powerpc/mm/mmu_context.c arch/powerpc/mm/tlb-radix.c+27 -150 replies

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Cover letter [PATCH 0/3] powerpc/64s/radix pte manipulation optimisations

Here's a few patches which I'm sure will cause a lot of concern, but I think now is the time to have it out and really start optimising these things as far as we can. Radix MMU has been stable for quite some time, and distros have made releases with the more conservative flushes and barriers and updates etc.

If we decide not to do any of these things, we can document why not so it becomes easier to revisit.

With these patches, plus the TLB flush reduction patches earlier, plus a few generic mm patches that I haven't posted yet, fork/exec benchmark from selftests increases performance by 11%.

A test which mprotects 16GB of memory to readonly, then reads a byte from each page, then protects read/write and updates a byte from each page, then repeats, is more tha 2x faster. Mostly due to reduced TLB flushing, barriers, and atomics from these two patch sets.

Nicholas Piggin (3):
powerpc/64s/radix: make ptep_get_and_clear_full non-atomic for the
full case
powerpc/64s/radix: avoid ptesync after set_pte and
ptep_set_access_flags
powerpc/64s/radix: optimise pte_update

 arch/powerpc/include/asm/book3s/64/radix.h | 37 +++++++++-------------
 arch/powerpc/mm/mmu_context.c              |  6 ++--
 arch/powerpc/mm/tlb-radix.c                | 11 ++++++-
 3 files changed, 29 insertions(+), 25 deletions(-)
Signature · 1 line
2.17.0