use adrp/add pairs for PLT entries
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Cover letter [PATCH 0/2] use adrp/add pairs for PLT entries
Hi Ard,
Quoted 9 lines · Ard Biesheuvel
Currently, PLT entries use a non-idiomatic movn/movz/movz/br instruction sequence which is also longer than necessary. Also, the code emitting them does not use the instruction generation code but open codes the opcodes directly.
The extended KASLR range is now 4 GB, given that we switched to the small code model everywhere else (including for modules), so we can switch to adrp/add/br sequences which are easier in the I-cache.
Quoted 7 lines
So implement adrp/add pair generation in the instruction generation code and wire it up into the PLT code. Note that the Cortex-A53 errata handling requires some special care to ensure that generated veneers are not susceptible to the erratum.
Cc Torsten Duwe <[email protected]>Cc Jessica Yu <[email protected]>
I've applied this, with a couple of extra comments in the plt comparison code and the Reviewed-by from Torsten. There were some trivial conflicts with Jessica's rework of the plt lookup, but I think I got it right. Please take a look at for-next/core when you get a chance.
Will