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x86/mm/cpa: Fix cpa-array TLB invalidation

Peter Zijlstra lkml 1 version In review

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  1. v1 Latest4 patches 17 repliesIn review

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/4x86/mm/cpa: Add __cpa_addr() helperarch/x86/mm/pageattr.c+19 -190 replies
2/4x86/mm/cpa: Fix cpa_flush_array()arch/x86/mm/mm_internal.h arch/x86/mm/pageattr.c arch/x86/mm/tlb.c+43 -251 reply
3/4x86/mm/cpa: Fold cpa_flush_range() and cpa_flush_array()arch/x86/mm/pageattr.c+29 -670 replies
4/4x86/mm/cpa: Better use clflushoptarch/x86/mm/pageattr.c+17 -120 replies

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Cover letter [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

Hi,

Yesterday Tom reported a CPA bug triggered by the AMDGPU team.

It turns out that with commit:

a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")

I misread the cpa array code and messed up the TLB invalidations for it. These patches (hopefully) fix the issue while also shrinking the CPA code again.

Tom, would you be so kind as to test again? These patches are significantly different from what I send you yesterday.

---

arch/x86/mm/mm_internal.h |   2 +
arch/x86/mm/pageattr.c    | 167 ++++++++++++++++++++--------------------------
arch/x86/mm/tlb.c         |   4 +-
3 files changed, 79 insertions(+), 94 deletions(-)

Read the cover letter in its thread