Guest Architectural LBR Enabling

Hi All (especially developers who use perf in guest),

Please help review the ssuccessor pacthes to enable Arch LBR on KVM. (The prerequisite v13 LBR patchset [2] seems more eager to get the attention of reviewers and maintainer).

LBR (Last Branch Records) enables recording of software path history by logging taken branches and other control flows within architectural registers. Intel CPUs have had model-specific LBRs for quite some time but this evolves them into an architectural feature now.

The Architectural Last Branch Records (LBRS) is already publiced in the 319433-040 release of Intel® Architecture Instruction Set Extensions and Future Features Programming Reference [0].

The main advantages for the Arch LBR users are [1]:
- Faster context switching due to XSAVES support and faster reset of LBR MSRs via the new DEPTH MSR
- Faster LBR read for a non-PEBS event due to XSAVES support, which lowers the overhead of the NMI handler. (For a PEBS event, the LBR information is recorded in the PEBS records. There is no impact on the PEBS event.)
- Linux kernel can support the LBR features without knowing the model number of the current CPU.

The Kernel 5.9 will enable Arch LBR on the host based on tip/perf/core, so this patchset happens to enable it on KVM as well.

Before 'git am' this patchset, you may need merge the latest tip/perf/core branch and the legacy LBR enabling patches [PATCH v13 00/10] Guest Last Branch Recording Enabling [2]. or just wait for the above pacthes to be merged upstream.

[0] https://software.intel.com/content/www/us/en/develop/download/
intel-architecture-instruction-set-extensions-and-future-features-programming-reference.html
[1] https://lore.kernel.org/lkml/[email protected]/
[2] https://lore.kernel.org/kvm/[email protected]/

Please check more details in each commit and feel free to comment.

Like Xu (6):
KVM: vmx/pmu: Add VMCS field check before exposing LBR_FMT perf/x86/lbr: Unify LBR_INFO registers exposure check condition
KVM: vmx/pmu: Add MSR_ARCH_LBR_DEPTH emulation for Arch LBR
KVM: vmx/pmu: Add MSR_ARCH_LBR_CTL emulation for Arch LBR
KVM: vmx/pmu: Add Arch LBR emulation and its VMCS field
KVM: x86: Expose Architectural LBR CPUID and its XSAVES bit

 arch/x86/events/intel/lbr.c     |  4 +-
 arch/x86/include/asm/vmx.h      |  4 ++
 arch/x86/kvm/cpuid.c            | 19 +++++++++
 arch/x86/kvm/vmx/capabilities.h | 16 ++++++-
 arch/x86/kvm/vmx/pmu_intel.c    | 74 +++++++++++++++++++++++++++++++--
 arch/x86/kvm/vmx/vmx.c          | 16 ++++++-
 arch/x86/kvm/vmx/vmx.h          |  3 ++
 arch/x86/kvm/x86.c              |  6 +++
 8 files changed, 133 insertions(+), 9 deletions(-)

2.21.3