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Couple improvements for Tegra clk driver

Dmitry Osipenko linux-clk linux-devicetree linux-tegra lkml 8 versions – Applied

Status from this message: Applied, thanks!

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Versions newest first · linked by author and title

  1. v8 Latest9 patches 7 repliesApplied
  2. v78 patches 3 repliesSuperseded
  3. v67 patches 2 repliesSuperseded
Earlier versions · 5
VersionPostedPatchesRepliesStatus
v57 patches2 repliesSuperseded
v47 patches3 repliesSuperseded
v36 patches0 repliesSuperseded
v25 patches5 repliesSuperseded
v13 patches0 repliesSuperseded

Patches in v8 Applied

#Subject and filesSizeRepliesApplied
1/9clk: tegra30: Use 300MHz for video decoder by defaultdrivers/clk/tegra/clk-tegra30.c+1 -10 replies
2/9clk: tegra: Fix refcounting of gate clocksdrivers/clk/tegra/clk-periph-gate.c drivers/clk/tegra/clk-periph.c+58 -254 replies
3/9clk: tegra: Ensure that PLLU configuration is applied properlydrivers/clk/tegra/clk-pll.c+4 -50 replies
4/9clk: tegra: Halve SCLK rate on Tegra20drivers/clk/tegra/clk-tegra20.c+3 -30 replies
5/9clk: tegra: Don't allow zero clock rate for PLLsdrivers/clk/tegra/clk-pll.c+3 -00 replies
6/9clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttlingdrivers/clk/tegra/clk-tegra-super-cclk.c drivers/clk/tegra/clk-tegra30.c+15 -30 replies
7/9clk: tegra: Mark external clocks as not having reset controldrivers/clk/tegra/clk-tegra-periph.c+3 -30 replies
8/9clk: tegra: Don't deassert reset on enabling clocksdrivers/clk/tegra/clk-periph-gate.c drivers/clk/tegra/clk-tegra30.c drivers/clk/tegra/clk.h+1 -130 replies
9/9dt-bindings: clock: tegra: Convert to schemaDocumentation/devicetree/bindings/clock/nvidia,tegra114-car.txt Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml +4 more+184 -3521 reply

Reviews trailers per patch

5 of 9 patches have a Reviewed-by or Acked-by.

PatchThierry RedingRob HerringJon Hunter
1/9A-b
2/9A-b A-b T-b
3/9A-b
4/9A-b
5/9
6/9
7/9
8/9
9/9R-b

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 3 reviewers.

Read the v8 thread

Cover letter [PATCH v8 0/9] Couple improvements for Tegra clk driver

This series fixes couple minor standalone problems of the Tegra clk driver and adds new features.

Changelog:

v8: - Replaced division with a shift, which was suggested by Michał Mirosław
in a comment to "Handle thermal DIV2 CPU frequency throttling" v7 patch. Cortex A9 CPUs don't have hardware divider and shifting is a minor improvement here, nevertheless it's good to have it.

- Added new patch "Don't deassert reset on enabling clocks", which I accidentally forgot to include in v7. Previously sound driver was a blocker for this patch, the sound is fixed now in v5.13. The patch itself is needed for maintaining proper clk/reset sequences by PMC and other drivers.

v7: - Added r-b from Rob Herring to the schema patch which he gave to v6.

- Dropped the MAINTAINERS-update patch. Previously Peter said on IRC that he doesn't have time on the tegra-clk driver anymore and approved the patch, but then he refused to ack the v6 patch, saying that he is not reading mailing lists. So I don't feel comfortable with that patch. Peter could send it by himself if will be necessary.

- Added these new patches:

clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling
clk: tegra: Mark external clocks as not having reset control

I sent out the new Tegra30 thermal sensor driver and now CPU clock could be throttled by the sensor hardware [1]. The first patch adds support for reporting of the throttled frequency properly.

[1] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=243126

During of debugging sound issues of Asus Transformer devices, I noticed that the external clocks are missing the no-reset flag. The second patch fixes it.

v6: - Made a small improvement and corrected a typo in patch
"Fix refcounting of gate clocks" that were spotted by Michał Mirosław.

v5: - Corrected example in the schema binding to silence dt_binding_check
warning.

- The Tegra124 binding is factored out into standalone binding since Tegra124 has properties that aren't used by other SoCs and I couldn't figure out how to make them conditional in schema.

v4: - Added new patch that converts DT bindings to schema.

v3: - Added acks from Thierry Reding that he gave to v2.

- Added new patch "clk: tegra: Don't allow zero clock rate for PLLs".

v2: - Added these new patches:

clk: tegra: Halve SCLK rate on Tegra20
MAINTAINERS: Hand Tegra clk driver to Jon and Thierry

v1: - Collected clk patches into a single series.

Dmitry Osipenko (9):
clk: tegra30: Use 300MHz for video decoder by default
clk: tegra: Fix refcounting of gate clocks
clk: tegra: Ensure that PLLU configuration is applied properly
clk: tegra: Halve SCLK rate on Tegra20
clk: tegra: Don't allow zero clock rate for PLLs
clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling
clk: tegra: Mark external clocks as not having reset control
clk: tegra: Don't deassert reset on enabling clocks
dt-bindings: clock: tegra: Convert to schema

 .../bindings/clock/nvidia,tegra114-car.txt    |  63 ----------
 .../bindings/clock/nvidia,tegra124-car.txt    | 107 ----------------
 .../bindings/clock/nvidia,tegra124-car.yaml   | 115 ++++++++++++++++++
 .../bindings/clock/nvidia,tegra20-car.txt     |  63 ----------
 .../bindings/clock/nvidia,tegra20-car.yaml    |  69 +++++++++++
 .../bindings/clock/nvidia,tegra210-car.txt    |  56 ---------
 .../bindings/clock/nvidia,tegra30-car.txt     |  63 ----------
 drivers/clk/tegra/clk-periph-gate.c           |  80 +++++++-----
 drivers/clk/tegra/clk-periph.c                |  11 ++
 drivers/clk/tegra/clk-pll.c                   |  12 +-
 drivers/clk/tegra/clk-tegra-periph.c          |   6 +-
 drivers/clk/tegra/clk-tegra-super-cclk.c      |  16 ++-
 drivers/clk/tegra/clk-tegra20.c               |   6 +-
 drivers/clk/tegra/clk-tegra30.c               |   6 +-
 drivers/clk/tegra/clk.h                       |   4 -
 15 files changed, 272 insertions(+), 405 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
 delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
 create mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml
 delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
 create mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml
 delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra210-car.txt
 delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
Signature · 1 line
2.30.2