4.9.310-rc1 review
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- v1 Latest43 patches 9 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/43 | arm64: errata: Provide macro for major and minor cpu revisionsarch/ arch/ | +12 | 0 replies | |
| 2/43 | arm64: Remove useless UAO IPI and describe how this gets enabledarch/ arch/ arch/ | +4 | 0 replies | |
| 3/43 | arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35arch/ | +4 | 0 replies | |
| 4/43 | arm64: capabilities: Update prototype for enable call backarch/ arch/ arch/ +4 more | +56 | 0 replies | |
| 5/43 | arm64: capabilities: Move errata work around check on boot CPUarch/ arch/ | +5 | 0 replies | |
| 6/43 | arm64: capabilities: Move errata processing codearch/ arch/ arch/ | +40 | 0 replies | |
| 7/43 | arm64: capabilities: Prepare for fine grained capabilitiesarch/ arch/ arch/ | +119 | 0 replies | |
| 8/43 | arm64: capabilities: Add flags to handle the conflicts on late CPUarch/ arch/ arch/ | +84 | 0 replies | |
| 9/43 | arm64: capabilities: Clean up midr range helpersarch/ | +50 | 0 replies | |
| 10/43 | arm64: Add helpers for checking CPU MIDR against a rangearch/ arch/ arch/ | +37 | 0 replies | |
| 11/43 | arm64: capabilities: Add support for checks based on a list of MIDRsarch/ arch/ arch/ +1 more | +58 | 0 replies | |
| 12/43 | clocksource/drivers/arm_arch_timer: Remove fsl-a008585 parameterDocumentation/ drivers/ | +0 | 0 replies | |
| 13/43 | clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructurearch/ drivers/ drivers/ | +80 | 0 replies | |
| 14/43 | arm64: arch_timer: Add infrastructure for multiple erratum detection methodsarch/ drivers/ | +76 | 0 replies | |
| 15/43 | arm64: arch_timer: Add erratum handler for CPU-specific capabilityarch/ drivers/ | +25 | 0 replies | |
| 16/43 | arm64: arch_timer: Add workaround for ARM erratum 1188873arch/ arch/ arch/ +2 more | +39 | 0 replies | |
| 17/43 | arm64: arch_timer: avoid unused function warningarch/ | +1 | 0 replies | |
| 18/43 | arm64: Add silicon-errata.txt entry for ARM erratum 1188873Documentation/ | +1 | 0 replies | |
| 19/43 | arm64: Make ARM64_ERRATUM_1188873 depend on COMPATarch/ | +1 | 0 replies | |
| 20/43 | arm64: Add part number for Neoverse N1arch/ | +2 | 0 replies | |
| 21/43 | arm64: Add part number for Arm Cortex-A77arch/ | +2 | 0 replies | |
| 22/43 | arm64: Add Neoverse-N2, Cortex-A710 CPU part definitionarch/ | +4 | 0 replies | |
| 23/43 | arm64: Add Cortex-X2 CPU part definitionarch/ | +2 | 0 replies | |
| 24/43 | arm64: Add helper to decode register from instructionarch/ arch/ | +31 | 0 replies | |
| 25/43 | arm64: entry.S: Add ventry overflow sanity checksarch/ | +3 | 0 replies | |
| 26/43 | arm64: entry: Make the trampoline cleanup optionalarch/ | +7 | 0 replies | |
| 27/43 | arm64: entry: Free up another register on kptis tramp_exit patharch/ | +12 | 0 replies | |
| 28/43 | arm64: entry: Move the trampoline data page before the text pagearch/ arch/ | +7 | 0 replies | |
| 29/43 | arm64: entry: Allow tramp_alias to access symbols after the 4K boundaryarch/ | +7 | 0 replies | |
| 30/43 | arm64: entry: Dont assume tramp_vectors is the start of the vectorsarch/ | +16 | 0 replies | |
| 31/43 | arm64: entry: Move trampoline macros out of ifdefd sectionarch/ | +6 | 0 replies | |
| 32/43 | arm64: entry: Make the kpti trampolines kpti sequence optionalarch/ | +11 | 0 replies | |
| 33/43 | arm64: entry: Allow the trampoline text to occupy multiple pagesarch/ arch/ arch/ +2 more | +20 | 0 replies | |
| 34/43 | arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigationsarch/ | +33 | 0 replies | |
| 35/43 | arm64: Move arm64_update_smccc_conduit() out of SSBD ifdefarch/ | +22 | 0 replies | |
| 36/43 | arm64: entry: Add vectors that have the bhb mitigation sequencesarch/ arch/ arch/ +1 more | +110 | 0 replies | |
| 37/43 | arm64: entry: Add macro for reading symbol addresses from the trampolinearch/ | +15 | 0 replies | |
| 38/43 | arm64: Add percpu vectors for EL1arch/ arch/ arch/ +2 more | +55 | 0 replies | |
| 39/43 | KVM: arm64: Add templates for BHB mitigation sequencesarch/ arch/ arch/ +2 more | +128 | 0 replies | |
| 40/43 | arm64: Mitigate spectre style branch history side channelsarch/ arch/ arch/ +5 more | +341 | 0 replies | |
| 41/43 | KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migratedarch/ arch/ arch/ | +13 | 0 replies | |
| 42/43 | arm64: add ID_AA64ISAR2_EL1 sys registerarch/ arch/ arch/ +1 more | +12 | 0 replies | |
| 43/43 | arm64: Use the clearbhb instruction in mitigationsarch/ arch/ arch/ +5 more | +58 | 0 replies |
Reviews trailers per patch
36 of 43 patches have a Reviewed-by or Acked-by.
| Patch | Suzuki K Poulose | Russell King (Oracle) | Catalin Marinas | Dave Martin | Anshuman Khandual | Marc Zyngier | Mark Rutland | Daniel Lezcano | Thomas Gleixner | Hanjun Guo | Robin Murphy | Julien Thierry | Florian Fainelli | Pavel Machek (CIP) | Shuah Khan |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Series | T-b | T-b | T-b | ||||||||||||
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| 4/43 | A-b | R-b | |||||||||||||
| 5/43 | R-b | ||||||||||||||
| 6/43 | R-b | ||||||||||||||
| 7/43 | R-b | ||||||||||||||
| 8/43 | R-b | ||||||||||||||
| 9/43 | R-b | ||||||||||||||
| 10/43 | R-b | ||||||||||||||
| 11/43 | R-b | ||||||||||||||
| 12/43 | A-b | ||||||||||||||
| 13/43 | A-b | ||||||||||||||
| 14/43 | A-b | R-b | |||||||||||||
| 15/43 | A-b | ||||||||||||||
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| 22/43 | A-b | R-b | |||||||||||||
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| 27/43 | R-b | R-b | |||||||||||||
| 28/43 | R-b | R-b | |||||||||||||
| 29/43 | R-b | R-b | |||||||||||||
| 30/43 | R-b | R-b | |||||||||||||
| 31/43 | R-b | R-b | |||||||||||||
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| 43/43 | R-b | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 15 reviewers.
Cover letter [PATCH 4.9 00/43] 4.9.310-rc1 review
This is the start of the stable review cycle for the 4.9.310 release. There are 43 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know.
Responses should be made by Fri, 08 Apr 2022 18:24:27 +0000. Anything received after that time might be too late.
The whole patch series can be found in one patch at:
https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.9.310-rc1.gz
or in the git tree and branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-4.9.y
and the diffstat can be found below.
thanks,
greg k-h
-------------
Pseudo-Shortlog of commits:
Greg Kroah-Hartman <[email protected]>
Linux 4.9.310-rc1
James Morse <[email protected]>
arm64: Use the clearbhb instruction in mitigations
James Morse <[email protected]>
arm64: add ID_AA64ISAR2_EL1 sys register
James Morse <[email protected]>
KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated
James Morse <[email protected]>
arm64: Mitigate spectre style branch history side channels
James Morse <[email protected]>
KVM: arm64: Add templates for BHB mitigation sequences
James Morse <[email protected]>
arm64: Add percpu vectors for EL1
James Morse <[email protected]>
arm64: entry: Add macro for reading symbol addresses from the trampoline
James Morse <[email protected]>
arm64: entry: Add vectors that have the bhb mitigation sequences
James Morse <[email protected]>
arm64: Move arm64_update_smccc_conduit() out of SSBD ifdef
James Morse <[email protected]>
arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations
James Morse <[email protected]>
arm64: entry: Allow the trampoline text to occupy multiple pages
James Morse <[email protected]>
arm64: entry: Make the kpti trampoline's kpti sequence optional
James Morse <[email protected]>
arm64: entry: Move trampoline macros out of ifdef'd section
James Morse <[email protected]>
arm64: entry: Don't assume tramp_vectors is the start of the vectors
James Morse <[email protected]>
arm64: entry: Allow tramp_alias to access symbols after the 4K boundary
James Morse <[email protected]>
arm64: entry: Move the trampoline data page before the text page
James Morse <[email protected]>
arm64: entry: Free up another register on kpti's tramp_exit path
James Morse <[email protected]>
arm64: entry: Make the trampoline cleanup optional
James Morse <[email protected]>
arm64: entry.S: Add ventry overflow sanity checks
Suzuki K Poulose <[email protected]>
arm64: Add helper to decode register from instruction
Anshuman Khandual <[email protected]>
arm64: Add Cortex-X2 CPU part definition
Suzuki K Poulose <[email protected]>
arm64: Add Neoverse-N2, Cortex-A710 CPU part definition
Rob Herring <[email protected]>
arm64: Add part number for Arm Cortex-A77
Marc Zyngier <[email protected]>
arm64: Add part number for Neoverse N1
Marc Zyngier <[email protected]>
arm64: Make ARM64_ERRATUM_1188873 depend on COMPAT
Marc Zyngier <[email protected]>
arm64: Add silicon-errata.txt entry for ARM erratum 1188873
Arnd Bergmann <[email protected]>
arm64: arch_timer: avoid unused function warning
Marc Zyngier <[email protected]>
arm64: arch_timer: Add workaround for ARM erratum 1188873
Marc Zyngier <[email protected]>
arm64: arch_timer: Add erratum handler for CPU-specific capability
Marc Zyngier <[email protected]>
arm64: arch_timer: Add infrastructure for multiple erratum detection methods
Ding Tianhong <[email protected]>
clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructure
Ding Tianhong <[email protected]>
clocksource/drivers/arm_arch_timer: Remove fsl-a008585 parameter
Suzuki K Poulose <[email protected]>
arm64: capabilities: Add support for checks based on a list of MIDRs
Suzuki K Poulose <[email protected]>
arm64: Add helpers for checking CPU MIDR against a range
Suzuki K Poulose <[email protected]>
arm64: capabilities: Clean up midr range helpers
Suzuki K Poulose <[email protected]>
arm64: capabilities: Add flags to handle the conflicts on late CPU
Suzuki K Poulose <[email protected]>
arm64: capabilities: Prepare for fine grained capabilities
Suzuki K Poulose <[email protected]>
arm64: capabilities: Move errata processing code
Suzuki K Poulose <[email protected]>
arm64: capabilities: Move errata work around check on boot CPU
Dave Martin <[email protected]>
arm64: capabilities: Update prototype for enable call back
Suzuki K Poulose <[email protected]>
arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35
James Morse <[email protected]>
arm64: Remove useless UAO IPI and describe how this gets enabled
Robert Richter <[email protected]>
arm64: errata: Provide macro for major and minor cpu revisions
-------------
Diffstat:
Documentation/arm64/silicon-errata.txt | 1 + Documentation/kernel-parameters.txt | 9 - Makefile | 4 +- arch/arm/include/asm/kvm_host.h | 5 + arch/arm/kvm/psci.c | 4 + arch/arm64/Kconfig | 24 ++ arch/arm64/include/asm/arch_timer.h | 44 ++- arch/arm64/include/asm/assembler.h | 34 ++ arch/arm64/include/asm/cpu.h | 1 + arch/arm64/include/asm/cpucaps.h | 4 +- arch/arm64/include/asm/cpufeature.h | 232 ++++++++++++- arch/arm64/include/asm/cputype.h | 63 ++++ arch/arm64/include/asm/fixmap.h | 6 +- arch/arm64/include/asm/insn.h | 2 + arch/arm64/include/asm/kvm_host.h | 4 + arch/arm64/include/asm/kvm_mmu.h | 2 +- arch/arm64/include/asm/mmu.h | 8 +- arch/arm64/include/asm/processor.h | 6 +- arch/arm64/include/asm/sections.h | 6 + arch/arm64/include/asm/sysreg.h | 5 + arch/arm64/include/asm/vectors.h | 74 +++++ arch/arm64/kernel/bpi.S | 55 +++ arch/arm64/kernel/cpu_errata.c | 591 ++++++++++++++++++++++++++------- arch/arm64/kernel/cpufeature.c | 167 +++++++--- arch/arm64/kernel/cpuinfo.c | 1 + arch/arm64/kernel/entry.S | 197 ++++++++--- arch/arm64/kernel/fpsimd.c | 1 + arch/arm64/kernel/insn.c | 29 ++ arch/arm64/kernel/smp.c | 6 - arch/arm64/kernel/traps.c | 4 +- arch/arm64/kernel/vmlinux.lds.S | 2 +- arch/arm64/kvm/hyp/hyp-entry.S | 4 + arch/arm64/kvm/hyp/switch.c | 9 +- arch/arm64/mm/fault.c | 17 +- arch/arm64/mm/mmu.c | 11 +- drivers/clocksource/Kconfig | 4 + drivers/clocksource/arm_arch_timer.c | 192 ++++++++--- include/linux/arm-smccc.h | 7 + 38 files changed, 1504 insertions(+), 331 deletions(-)