arch: Add qspinlock support and atomic cleanup

From: Guo Ren <[email protected]>

In this series:
- Cleanup generic ticket-lock code, (Using smp_mb__after_spinlock as RCsc)
- Add qspinlock and combo-lock for riscv
- Add qspinlock to openrisc
- Use generic header in csky
- Optimize cmpxchg & atomic code

Enable qspinlock and meet the requirements mentioned in a8ad07e5240c9 ("asm-generic: qspinlock: Indicate the use of mixed-size atomics").

RISC-V LR/SC pairs could provide a strong/weak forward guarantee that depends on micro-architecture. And RISC-V ISA spec has given out several limitations to let hardware support strict forward guarantee (RISC-V User ISA - 8.3 Eventual Success of Store-Conditional Instructions).

eg:
Some riscv hardware such as BOOMv3 & XiangShan could provide strict & strong forward guarantee (The cache line would be kept in an exclusive state for Backoff cycles, and only this core's interrupt could break the LR/SC pair).
Qemu riscv give a weak forward guarantee by wrong implementation currently [1].

So we Add combo spinlock (ticket & queued) support for riscv. Thus different kinds of memory model micro-arch processors could use the same Image

The first try of qspinlock for riscv was made in 2019.1 [2].

[1] https://github.com/qemu/qemu/blob/master/target/riscv/insn_trans/trans_rva.c.inc
[2] https://lore.kernel.org/linux-riscv/[email protected]/#r

Guo Ren (15):
asm-generic: ticket-lock: Remove unnecessary atomic_read
asm-generic: ticket-lock: Use the same struct definitions with qspinlock
asm-generic: ticket-lock: Move into ticket_spinlock.h
asm-generic: ticket-lock: Keep ticket-lock the same semantic with qspinlock
asm-generic: spinlock: Add queued spinlock support in common header
riscv: atomic: Clean up unnecessary acquire and release definitions
riscv: cmpxchg: Remove xchg32 and xchg64
riscv: cmpxchg: Forbid arch_cmpxchg64 for 32-bit
riscv: cmpxchg: Optimize cmpxchg64
riscv: Enable ARCH_INLINE_READ*/WRITE*/SPIN*
riscv: Add qspinlock support
riscv: Add combo spinlock support
openrisc: cmpxchg: Cleanup unnecessary codes
openrisc: Move from ticket-lock to qspinlock
csky: spinlock: Use the generic header files

 arch/csky/include/asm/Kbuild           |   2 +
 arch/csky/include/asm/spinlock.h       |  12 --
 arch/csky/include/asm/spinlock_types.h |   9 --
 arch/openrisc/Kconfig                  |   1 +
 arch/openrisc/include/asm/Kbuild       |   2 +
 arch/openrisc/include/asm/cmpxchg.h    | 192 ++++++++++---------------
 arch/riscv/Kconfig                     |  49 +++++++
 arch/riscv/include/asm/Kbuild          |   3 +-
 arch/riscv/include/asm/atomic.h        |  19 ---
 arch/riscv/include/asm/cmpxchg.h       | 177 +++++++----------------
 arch/riscv/include/asm/spinlock.h      |  77 ++++++++++
 arch/riscv/kernel/setup.c              |  22 +++
 include/asm-generic/spinlock.h         |  94 ++----------
 include/asm-generic/spinlock_types.h   |  12 +-
 include/asm-generic/ticket_spinlock.h  |  93 ++++++++++++
 15 files changed, 384 insertions(+), 380 deletions(-)
 delete mode 100644 arch/csky/include/asm/spinlock.h
 delete mode 100644 arch/csky/include/asm/spinlock_types.h
 create mode 100644 arch/riscv/include/asm/spinlock.h
 create mode 100644 include/asm-generic/ticket_spinlock.h

2.36.1