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Cleanup for Intel PMU initialization

[email protected] lkml stable 1 version Applied

Status from this message: The following commit has been merged into the perf/urgent branch of tip:

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  1. v1 Latest3 patches 2 repliesApplied

Patches in v1 Applied

#Subject and filesSizeRepliesApplied
1/3perf/x86/intel: Clean up PEBS-via-PT on hybridarch/x86/events/intel/core.c arch/x86/events/intel/ds.c+9 -110 replies
2/3perf/x86/intel: Fix ARCH_PERFMON_NUM_COUNTER_LEAFarch/x86/events/intel/core.c arch/x86/include/asm/perf_event.h+35 -110 replies
3/3perf/x86/intel: Clean up counter information update and checkarch/x86/events/core.c arch/x86/events/intel/core.c arch/x86/events/perf_event.h+65 -580 replies

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Cover letter [PATCH 0/3] Cleanup for Intel PMU initialization

From: Kan Liang <[email protected]>

The patches are to clean up different features. They all touch the initialization code. There are some dependencies. So I put them in a patch set to facilitate the review and merge.

Patch 1 is to clear up the PEBS-via-PT on hybrid.
The original V1 patch can be found at
https://lore.kernel.org/lkml/[email protected]/
This is the V2, which only update the comments.

Patch 2 is to clean up the 023H enumeration.
To close the discussion at
https://lore.kernel.org/lkml/[email protected]/

Patch 3 is to clean up the counter information update and check codes. To close the discussion at
https://lore.kernel.org/lkml/[email protected]/

Kan Liang (3):
perf/x86/intel: Clean up PEBS-via-PT on hybrid perf/x86/intel: Fix ARCH_PERFMON_NUM_COUNTER_LEAF perf/x86/intel: Clean up counter information update and check

 arch/x86/events/core.c            |  10 +--
 arch/x86/events/intel/core.c      | 134 +++++++++++++++---------------
 arch/x86/events/intel/ds.c        |  10 ++-
 arch/x86/events/perf_event.h      |   1 +
 arch/x86/include/asm/perf_event.h |  28 ++++++-
 5 files changed, 106 insertions(+), 77 deletions(-)
Signature · 1 line
2.38.1