RISC-V CRC optimizations
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- v1 Latest4 patches 7 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/4 | riscv/crc: add "template" for Zbc optimized CRC functionsarch/ scripts/ | +319 | 0 replies | |
| 2/4 | riscv/crc32: reimplement the CRC32 functions using new templatearch/ arch/ arch/ +4 more | +177 | 0 replies | |
| 3/4 | riscv/crc-t10dif: add Zbc optimized CRC-T10DIF functionarch/ arch/ arch/ +3 more | +66 | 0 replies | |
| 4/4 | riscv/crc64: add Zbc optimized CRC64 functionsarch/ arch/ arch/ +4 more | +112 | 0 replies |
Reviews trailers per patch
None of the 4 patches has a Reviewed-by or Acked-by of their own; the series has one for all of them.
| Patch | Björn Töpel | Alexandre Ghiti |
|---|---|---|
| Series | T-b | A-b |
| 1/4 | ||
| 2/4 | ||
| 3/4 | ||
| 4/4 |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [PATCH 0/4] RISC-V CRC optimizations
This patchset is a replacement for
"[PATCH v4] riscv: Optimize crct10dif with Zbc extension"
(https://lore.kernel.org/r/[email protected]/).
It adopts the approach that I'm taking for x86 where code is shared among CRC variants. It replaces the existing Zbc optimized CRC32 functions, then adds Zbc optimized CRC-T10DIF and CRC64 functions.
This new code should be significantly faster than the current Zbc optimized CRC32 code and the previously proposed CRC-T10DIF code. It uses "folding" instead of just Barrett reduction, and it also implements Barrett reduction more efficiently.
This applies to crc-next at
https://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux.git/log/?h=crc-next.
It depends on other patches that are queued there for 6.15, so I plan to take it through there if there are no objections.
Tested with crc_kunit in QEMU (set CONFIG_CRC_KUNIT_TEST=y and CONFIG_CRC_BENCHMARK=y), both 32-bit and 64-bit. I don't have real Zbc capable hardware to benchmark this on, but the new code should work very well; similar optimizations work very well on other architectures.
Eric Biggers (4):
riscv/crc: add "template" for Zbc optimized CRC functions riscv/crc32: reimplement the CRC32 functions using new template riscv/crc-t10dif: add Zbc optimized CRC-T10DIF function riscv/crc64: add Zbc optimized CRC64 functions
arch/riscv/Kconfig | 2 + arch/riscv/lib/Makefile | 5 + arch/riscv/lib/crc-clmul-consts.h | 122 +++++++++++ arch/riscv/lib/crc-clmul-template.h | 265 ++++++++++++++++++++++++ arch/riscv/lib/crc-clmul.h | 23 +++ arch/riscv/lib/crc-t10dif.c | 24 +++ arch/riscv/lib/crc16_msb.c | 18 ++ arch/riscv/lib/crc32-riscv.c | 310 ---------------------------- arch/riscv/lib/crc32.c | 53 +++++ arch/riscv/lib/crc32_lsb.c | 18 ++ arch/riscv/lib/crc32_msb.c | 18 ++ arch/riscv/lib/crc64.c | 34 +++ arch/riscv/lib/crc64_lsb.c | 18 ++ arch/riscv/lib/crc64_msb.c | 18 ++ scripts/gen-crc-consts.py | 55 ++++- 15 files changed, 672 insertions(+), 311 deletions(-) create mode 100644 arch/riscv/lib/crc-clmul-consts.h create mode 100644 arch/riscv/lib/crc-clmul-template.h create mode 100644 arch/riscv/lib/crc-clmul.h create mode 100644 arch/riscv/lib/crc-t10dif.c create mode 100644 arch/riscv/lib/crc16_msb.c delete mode 100644 arch/riscv/lib/crc32-riscv.c create mode 100644 arch/riscv/lib/crc32.c create mode 100644 arch/riscv/lib/crc32_lsb.c create mode 100644 arch/riscv/lib/crc32_msb.c create mode 100644 arch/riscv/lib/crc64.c create mode 100644 arch/riscv/lib/crc64_lsb.c create mode 100644 arch/riscv/lib/crc64_msb.c
base-commit: cf1ea3a7c1f63cba7d1dd313ee3accde0c0c8988
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2.48.1