Implementing bitops rotate using riscv Zbb extension
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Cover letter [PATCH 0/2] Implementing bitops rotate using riscv Zbb extension
From: Chen Pei <[email protected]>
This patch series moves the ror*/rol* functions from include/linux/bitops.h to include/asm-generic/bitops/rotate.h as a generic implementation.
At the same time, an optimized implementation is made based on the bitwise rotation instructions provided by the RISC-V Zbb extension[1].
Based on the RISC-V processor XUANTIE C908, I tested the performance of sha3_generic. Compared with the generic implementation, the RISC-V Zbb instruction implementation performance increased by an average of 6.87%.
Test method:
1. CONFIG_CRYPTO_TEST=m
2. modprobe tcrypt mode=322 sec=3
Different parameters will be selected to test the performance of sha3-224.
[1] https://github.com/riscv/riscv-bitmanip/
Chen Pei (2):
bitops: generic rotate
bitops: rotate: Add riscv implementation using Zbb extension
arch/riscv/include/asm/bitops.h | 127 ++++++++++++++++++++++++++++ include/asm-generic/bitops.h | 2 +- include/asm-generic/bitops/rotate.h | 97 +++++++++++++++++++++ include/linux/bitops.h | 80 ------------------ tools/include/asm-generic/bitops.h | 2 +- 5 files changed, 226 insertions(+), 82 deletions(-) create mode 100644 include/asm-generic/bitops/rotate.h
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2.49.0