Fix eic770x warm reset
Status from this message: Applied this series to the riscv/opensbi repo.
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v2 Latest2 patches 2 repliesApplied
- v12 patches 2 repliesSuperseded
Changes in v2 from the cover letter
- Clear the disableDCacheClockGate bit in EIC770X_CSR_FEAT0 See more detailed comments in function eic770x_hart_stop
Patches in v2 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/2 | include: utils/hsm: Add __noreturn attribute for sifive_ceaseinclude/ | +2 | 0 replies | |
| 2/2 | platform: generic: eswin: Add eic770x_hsm and fix warm reset issuesplatform/ platform/ platform/ | +126 | 1 reply |
Reviews trailers per patch
None of the 2 patches has a Reviewed-by or Acked-by of their own; the series has one for all of them.
| Patch | Anup Patel |
|---|---|
| Series | R-b |
| 1/2 | |
| 2/2 |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [PATCH v2 0/2] Fix eic770x warm reset
Use the CEASE instruction as documented in the SoC datasheet to fix the warm reset issue observed on my EIC7700/Hifive P550. Refer to PATCH 2/2 for a more detailed description.
---
Changes in v2:
- Clear the disableDCacheClockGate bit in EIC770X_CSR_FEAT0 See more detailed comments in function eic770x_hart_stop
---
Bo Gan (2):
include: utils/hsm: Add __noreturn attribute for sifive_cease
platform: generic: eswin: Add eic770x_hsm and fix warm reset issues
include/sbi_utils/hsm/fdt_hsm_sifive_inst.h | 3 +- platform/generic/eswin/eic770x.c | 118 ++++++++++++++++++-- platform/generic/eswin/hfp.c | 4 +- platform/generic/include/eswin/eic770x.h | 20 +++- 4 files changed, 128 insertions(+), 17 deletions(-)
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