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crypto mv_cesa : Add sha1 and hmac(sha1) support to the mv_cesa driver

Uri Simchoni linux-crypto 2 versions – In review

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  1. v2 Latest10 patches 1 replyIn review
  2. v110 patches 1 replySuperseded

Patches in v2 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/10crypto mv_cesa : Invoke the user callback from a softirq contextdrivers/crypto/mv_cesa.c+2 -00 replies
2/10crypto mv_cesa : Remove compiler warning in mv_cesa driverdrivers/crypto/mv_cesa.c+1 -00 replies
3/10crypto mv_cesa : Fix situation where the dest sglist is organized differently than the source sglistdrivers/crypto/mv_cesa.c+2 -10 replies
4/10crypto mv_cesa : Fix situations where the src sglist spans more data than the request asks fordrivers/crypto/mv_cesa.c+34 -180 replies
5/10crypto mv_cesa : Enqueue generic async requestsdrivers/crypto/mv_cesa.c+24 -190 replies
6/10crypto mv_cesa : Rename a variable to a more suitable namedrivers/crypto/mv_cesa.c+5 -50 replies
7/10crypto mv_cesa : Execute some code via function pointers rathr than direct callsdrivers/crypto/mv_cesa.c+9 -40 replies
8/10crypto mv_cesa : Make the copy-back of data optionaldrivers/crypto/mv_cesa.c+27 -220 replies
9/10crypto mv_cesa : Support processing of data from previous requestsdrivers/crypto/mv_cesa.c+5 -30 replies
10/10crypto mv_cesa : Add sha1 and hmac(sha1) async hash driversdrivers/crypto/mv_cesa.c drivers/crypto/mv_cesa.h+542 -120 replies

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Cover letter [PATCHv2 0/10] crypto mv_cesa : Add sha1 and hmac(sha1) support to the mv_cesa driver

This is a resubmission of a patchset I set a while ago, and that was corrupted by my email client.

The following patchset adds async hashing (sha1 and hmac-sha1) to the mv_cesa crypto driver. This driver utilizes the Marvell CESA crypto accelerator that exists in some Marvell CPU's (Orion and Kirkwood). The existing driver has AES crypto support.

Compared to SW hashing on a 1.2GHz Kirkwood, the HW acceleration is about 20% faster, but more importantly, at reduced CPU utilization.

The patchset is divided as follows:
- patches 1-4 are bug/warning fixes to the existing driver
- patches 5-9 refactor the existing driver with no functional change to accommodate the added functionality
- patch 10 adds the sha1 and hmac-sha1 support.

The driver requires the sha1 and hmac sw drivers in order to handle some corner cases (i.e. it never falls back on a complete request but sometimes it hashes the last 64 bytes in sw)

Read the cover letter in its thread