S5PV210: added MIPI-DSI Driver.
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- v1 Latest3 patches 0 repliesNew
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/3 | FB: added a structure for CPU interface to linux/fb.hinclude/ | +12 | 0 replies | |
| 2/3 | S5PV210: added parameters for CPU interface to plat-samsung/fb.harch/ | +10 | 1 reply | |
| 2/3 | S5PV210: added parameters for CPU interface to plat-samsung/fb.h | +0 | 0 replies | |
| 3/3 | S5PV210: added MIPI-DSI Driver.arch/ arch/ arch/ +11 more | +2848 | 1 reply | |
| 3/3 | S5PV210: added MIPI-DSI Driver. | +0 | 0 replies |
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Cover letter [PATCH 0/3] S5PV210: added MIPI-DSI Driver.
Hello all,
This patch is a MIPI-DSI driver for S5PV210.
PATCH 1/3: add a structure for CPU interface to linux/fb.h
- RGB or CPU interfaces could be used as display mode but framebuffer framework doesn't consider CPU interface so I added this structure because fb_cpumode structure could be used commonly.
PATCH 2/3: add parameters for CPU interface to plat-samsung/fb.h
- MIPI-DSI driver would use s3c-fb driver so I added some parameters because MIPI-DSI driver supports CPU interface also.
PATCH 3/3: add MIPI-DSI driver for S5PV210.
driver features:
. Maximum resolution ranges up to XGA (1024x760)
. CSIS0 supports 1,2,3 or 4 data lanes
. CSIS1 supports 1 or 2 data lanes
. supports pixel format : 16bpp, 18bpp packed,
18bpp loosely packed (3 byte format), and 24bpp
. supports RGB interface for video image from display controller . support I80 interface for command mode image input from display controller . supports PMS control inteerface for PLL to configure byte clock frequency . supports Prescaler to generate escape clock from byte clock
thank you.