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OMAP2+: hwmod/clockevent: allow late-init of individual hwmods

Cousson, Benoit linux-arm-kernel linux-omap 1 version New

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  1. v1 Latest2 of 8 patches 0 repliesNew

2 of 8 patches are in this archive. The cover letter announces 8.

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
4/8OMAP2+: hwmod: find MPU initiator hwmod during in _register()+0 -01 reply
5/8OMAP2+: hwmod: allow multiple calls to omap_hwmod_init()+0 -00 replies

Reviews trailers per patch

None of the 2 patches has a Reviewed-by or Acked-by of their own; the series has one for all of them.

PatchSantosh ShilimkarPaul Walmsley
SeriesA-b R-b
4/8
5/8

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v1 thread

Cover letter [PATCH 0/8] OMAP2+: hwmod/clockevent: allow late-init of individual hwmods

Hi Paul,

Quoted 10 lines · Paul Walmsley

Hello,

This series adds the ability to late-initialize individual hwmods. The goal here is for clockevent (and eventually clocksource) hwmods to be late-initialized individually, and right before they are needed, in the timer init code. Then omap_hwmod_late_init(), which late-inits the rest of the hwmods, is intended to run as an initcall -- much later in the boot process.

Quoted 5 lines

This series includes the OMAP2/3 hwmod data for the GPTIMERs that Tarun posted earlier. This data is necessary for this new code to avoid warnings during boot.

Boot-tested on N800, OMAP34xx Beagleboard and OMAP4430ES2 Panda.

I'm testing it on 4430sdp, and I have the following warning:

[    0.000000] omap_hwmod: dpll_mpu_m2_ck: missing clockdomain for dpll_mpu_m2_ck.
[    0.000000] ------------[ cut here ]------------
[    0.000000] WARNING: at arch/arm/mach-omap2/timer-gp.c:157 omap2_gp_timer_init+0x80/0x190()
[    0.000000] timer-gp: omap_dm_timer_set_source() failed
[    0.000000] Modules linked in:
[    0.000000] [<c0062a6c>] (unwind_backtrace+0x0/0xec) from [<c009422c>] (warn_slowpath_common+0x4c/0x64)
[    0.000000] [<c009422c>] (warn_slowpath_common+0x4c/0x64) from [<c00942c4>] (warn_slowpath_fmt+0x2c/0x3c)
[    0.000000] [<c00942c4>] (warn_slowpath_fmt+0x2c/0x3c) from [<c0010e30>] (omap2_gp_timer_init+0x80/0x190)
[    0.000000] [<c0010e30>] (omap2_gp_timer_init+0x80/0x190) from [<c000c0dc>] (time_init+0x20/0x30)
[    0.000000] [<c000c0dc>] (time_init+0x20/0x30) from [<c0008cbc>] (start_kernel+0x1a4/0x30c)
[    0.000000] [<c0008cbc>] (start_kernel+0x1a4/0x30c) from [<80008038>] (0x80008038)
[    0.000000] ---[ end trace 1b75b31a2719ed1c ]---
[    0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz

Regards,
Benoit