target-ppc: PowerPC VSX Stage 3
Status from this message: Thanks applied all to ppc-next.
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v5 Latest22 patches 3 repliesApplied
- v422 patches 8 repliesSuperseded
- v319 patches 10 repliesSuperseded
Earlier versions · 2
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v2 | 19 patches | 1 reply | Superseded | |
| v1 | 19 patches | 38 replies | Superseded |
Patches in v5 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/22 | softfloat: Fix float64_to_uint64fpu/ | +94 | 1 reply | |
| 2/22 | softfloat: Add float32_to_uint64()fpu/ include/ | +47 | 1 reply | |
| 3/22 | softfloat: Fix float64_to_uint64_round_to_zerofpu/ | +5 | 0 replies | |
| 4/22 | softfloat: Fix float64_to_uint32fpu/ | +7 | 0 replies | |
| 5/22 | softfloat: Fix float64_to_uint32_round_to_zerofpu/ | +7 | 0 replies | |
| 6/22 | target-ppc: Add set_fprf Argument to fload_invalid_op_excp()target-ppc/ | +55 | 0 replies | |
| 7/22 | target-ppc: General Support for VSX Helperstarget-ppc/ target-ppc/ | +55 | 0 replies | |
| 8/22 | target-ppc: Add VSX ISA2.06 xadd/xsub Instructionstarget-ppc/ target-ppc/ target-ppc/ | +78 | 0 replies | |
| 9/22 | target-ppc: Add VSX ISA2.06 xmul Instructionstarget-ppc/ target-ppc/ target-ppc/ | +55 | 0 replies | |
| 10/22 | target-ppc: Add VSX ISA2.06 xdiv Instructionstarget-ppc/ target-ppc/ target-ppc/ | +58 | 0 replies | |
| 11/22 | target-ppc: Add VSX ISA2.06 xre Instructionstarget-ppc/ target-ppc/ target-ppc/ | +44 | 0 replies | |
| 12/22 | target-ppc: Add VSX ISA2.06 xsqrt Instructionstarget-ppc/ target-ppc/ target-ppc/ | +53 | 0 replies | |
| 13/22 | target-ppc: Add VSX ISA2.06 xrsqrte Instructionstarget-ppc/ target-ppc/ target-ppc/ | +54 | 0 replies | |
| 14/22 | target-ppc: Add VSX ISA2.06 xtdiv Instructionstarget-ppc/ target-ppc/ target-ppc/ | +76 | 0 replies | |
| 15/22 | target-ppc: Add VSX ISA2.06 xtsqrt Instructionstarget-ppc/ target-ppc/ target-ppc/ | +63 | 0 replies | |
| 16/22 | target-ppc: Add VSX ISA2.06 Multiply Add Instructionstarget-ppc/ target-ppc/ target-ppc/ | +172 | 0 replies | |
| 17/22 | target-ppc: Add VSX xscmp*dp Instructionstarget-ppc/ target-ppc/ target-ppc/ | +45 | 0 replies | |
| 18/22 | target-ppc: Add VSX xmax/xmin Instructionstarget-ppc/ target-ppc/ target-ppc/ | +57 | 0 replies | |
| 19/22 | target-ppc: Add VSX Vector Compare Instructionstarget-ppc/ target-ppc/ target-ppc/ | +87 | 0 replies | |
| 20/22 | target-ppc: Add VSX Floating Point to Floating Point Conversion Instructionstarget-ppc/ target-ppc/ target-ppc/ | +57 | 0 replies | |
| 21/22 | target-ppc: Add VSX ISA2.06 Integer Conversion Instructionstarget-ppc/ target-ppc/ target-ppc/ | +173 | 0 replies | |
| 22/22 | target-ppc: Add VSX Rounding Instructionstarget-ppc/ target-ppc/ target-ppc/ | +113 | 0 replies |
Reviews trailers per patch
20 of 22 patches have a Reviewed-by or Acked-by.
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [Qemu-devel] [V5 PATCH 00/22] target-ppc: PowerPC VSX Stage 3
This is the third series of patches to add PowerPC VSX emulation support to QEMU.
This series adds the floating point arithmetic, compare, conversion and rounding instructions. Instructions are implemented using helpers and wherever practical, existing floating point code such as the softfloat library and the existing PowerPC floating point helper code.
As with the previous series, the Power ISA V2.06 instructions are added but the V2.07 instructions are not. The latter will be implemented in a future patch series.
V2: Implemented changes based on feedback from Richard Henderson and Peter Maydell:
- Included float64_to_uint64() patch in this series rather than just cite it as a pre-requesite.
- Isolated float32_to_uint64() in its own patch.
- Re-implemented helpers and eliminated the need for some of the proposed softfloat routines (float*_is_denormal, float*_get_unbiased_exp).
- Re-implemented severy helpers so that corner cases (e.g. invalid operations) are detected by softfloat.
- Re-implemented fused multiply-add to use the softfloat muladd routines.
- Re-implemented the min/max instructions to used the softfloat min/max functions.
- assorted style fixes
V3: re-submitting due to patch corruption.
V4: Folded in softfloat bug fixes per Peter Maydell's request.
V5: Additional comments from Peter Maydell and Richard Henderson:
- proper handling of NaNs with negative signs in conversion routines.
- proper rounding of small negatives in float32_to_uint64
- simplification of max/min instructions using new softfloat routines.
- assorted commentary changes.
Tom Musta (22):
softfloat: Fix float64_to_uint64
softfloat: Add float32_to_uint64()
softfloat: Fix float64_to_uint64_round_to_zero
softfloat: Fix float64_to_uint32
softfloat: Fix float64_to_uint32_round_to_zero
target-ppc: Add set_fprf Argument to fload_invalid_op_excp()
target-ppc: General Support for VSX Helpers
target-ppc: Add VSX ISA2.06 xadd/xsub Instructions
target-ppc: Add VSX ISA2.06 xmul Instructions
target-ppc: Add VSX ISA2.06 xdiv Instructions
target-ppc: Add VSX ISA2.06 xre Instructions
target-ppc: Add VSX ISA2.06 xsqrt Instructions
target-ppc: Add VSX ISA2.06 xrsqrte Instructions
target-ppc: Add VSX ISA2.06 xtdiv Instructions
target-ppc: Add VSX ISA2.06 xtsqrt Instructions
target-ppc: Add VSX ISA2.06 Multiply Add Instructions
target-ppc: Add VSX xscmp*dp Instructions
target-ppc: Add VSX xmax/xmin Instructions
target-ppc: Add VSX Vector Compare Instructions
target-ppc: Add VSX Floating Point to Floating Point Conversion
Instructions
target-ppc: Add VSX ISA2.06 Integer Conversion Instructions
target-ppc: Add VSX Rounding Instructions
fpu/softfloat.c | 191 ++++++++-- include/fpu/softfloat.h | 1 + target-ppc/fpu_helper.c | 991 ++++++++++++++++++++++++++++++++++++++++++++--- target-ppc/helper.h | 109 ++++++ target-ppc/translate.c | 243 ++++++++++++ 5 files changed, 1455 insertions(+), 80 deletions(-)