Another 16 L2C patches
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Cover letter [PATCH 00/16] Another 16 L2C patches
(Dropping most people from CC since this sub-thread is a Tegra-specific discussion)
Quoted 1 line · Russell King - ARM Linux
On Mon, Apr 28, 2014 at 11:27:09AM -0600, Stephen Warren wrote:
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I do see one error in dmesg during boot, but it doesn't appear to negatively affect operation in brief testing, and is present in linux-next without this series anyway. Is this message a problem?
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[ 0.000000] L2C: platform modifies aux control register: 0x02080000 -> 0x3e480001 [ 0.000000] L2C: DT/platform modifies aux control register: 0x02080000 -> 0x3e480001 [ 0.000000] L2C-310 errata 727915 769419 enabled [ 0.000000] L2C-310 enabling early BRESP for Cortex-A9 [ 0.000000] L2C-310: enabling full line of zeros but not enabled in Cortex-A9
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^^^^^^ this is logged at error level
Correct, it's an error because on Tegra you explicitly set bit 0 in the auxiliary control register, which is pointless unless the feature is also enabled in the Cortex-A9 control register as well.
Please forgive my almost complete lack of knowledge re: cache controllers. Is the correct fix for this:
a) To remove bit 0 from the aux_val passed to l2x0_of_init()
b) To set some BIT(3) in the Cortex-A9 auxcr, so this feature is enabled there too.
And if (b), I assume that's something that the bootloader should be doing, not the kernel?
Thanks.