arm: alignment trap tweaks
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Cover letter [PATCH 0/2] arm: alignment trap tweaks
Quoted 9 lines · Robin Murphy
Hi all,
Revisiting the alignment trap again thanks to an obscure corner case with NEON alignment hints - patch 1 is a repost from a while back as a ping, because modern userspaces really should just get a resounding "Don't do that!" if they manage to step outside the architecture. Patch 2 is the fix for cases where fixup does need to be turned back on for whatever reason.
Ping. Any comment on these? Admittedly it's a very hard-to-hit bug, but it's a bug all the same.
Thanks,
Robin.
Quoted 53 lines
The following testcase compiled with -marm illustrates the problem:
with fixup enabled, when the VLD1 instruction with the alignment hint set faults by performing a misaligned access, it fails to load the NEON registers as expected and eventually writes back nonsense to the base register, resulting in a misleading segfault on the next iteration.--->8---
#include <
stdint.h>
#include <stdio.h>static
uint8_tbuffer[256], got[256];int main() { uint8_t *base = (uint8_t *)((intptr_t)buffer + 0x7 & ~0x7); void *p = base, *q = got; int i; for (i=0; i<64; i++) base[i] = i; for (i=0; i<4; i++) { asm volatile ("vld1.8 {d0,d1}, [%0]\n vst1.8 {d0,d1}, [%1]\n" : "=r"(p),"=r"(q) : "0"(p),"1"(q) : "d0","d1"); printf("unaligned: %p [%d,%d,%d,...]\n", p++, got[0], got[1], got[2]); } p = base; for (i=0; i<4; i++) { asm volatile ("vld1.8 {d0,d1}, [%0:64]\n vst1.8 {d0,d1}, [%1]\n" : "=r"(p),"=r"(q) : "0"(p),"1"(q) : "d0","d1"); printf("misaligned: %p [%d,%d,%d,...]\n", p++, got[0], got[1], got[2]); } return 0; }--->8---
Robin Murphy (2):
arm: SIGBUS on unsupported ARMv6 unaligned accesses
arm: don't break misaligned NEON load/storearch/arm/mm/alignment.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)--
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