MIPS cache code cleanup
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Cover letter [U-Boot] [PATCH v2 0/8] MIPS cache code cleanup
2015-01-29 2:27 GMT+01:00 Paul Burton <[email protected]>:
Quoted 5 lines
This series cleans up the MIPS cache code somewhat, and unifies the mips32 & mips64 implementations of it. This is largely in preparation for further patches adding L2 cache support. The final patch of this series fixes a bug encountered with recent cores on Malta boards.
Quoted 10 lines
Paul Burton (8):
MIPS: avoid .set ISA for cache operations
MIPS: unify cache maintenance functions
MIPS: unify cache initialization code
MIPS: refactor L1 cache config reads to a macro
MIPS: refactor cache loops to a macro
MIPS: inline mips_init_[id]cache functions
MIPS: allow systems to skip loads during cache init
MIPS: clear TagLo select 2 during cache init
all patches applied to u-boot-mips/master, thanks
- Daniel