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ARM: mvebu: Enable perf support

Gregory CLEMENT linux-arm-kernel 1 version New

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  1. v2 Latest7 patches 0 repliesNew

Patches in v2 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/7irqchip: armada-370-xp: Initialize per cpu registers when CONFIG_SMP=N+0 -00 replies
2/7irqchip: armada-370-xp: Introduce a is_percpu_irq() helper for readability+0 -00 replies
3/7irqchip: armada-370-xp: Enable the PMU interrupts+0 -00 replies
4/7ARM: mvebu: Enable Performance Monitor Unit on Armada XP/370 SoCs+0 -00 replies
5/7ARM: mvebu: Enable Performance Monitor Unit on Armada 375 SoC+0 -00 replies
6/7ARM: mvebu: Enable Performance Monitor Unit on Armada 380/385 SoC+0 -00 replies
7/7ARM: mvebu: Enable perf support in mvebu_v7_defconfig+0 -00 replies

Reviews trailers per patch

All 7 patches have a Reviewed-by or Acked-by.

PatchGregory CLEMENT
1/7A-b
2/7A-b
3/7A-b
4/7A-b
5/7A-b
6/7A-b
7/7A-b

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v2 thread

Cover letter [PATCH v2 0/7] ARM: mvebu: Enable perf support

Hi Maxime,

Quoted 36 lines · Maxime Ripard

Hi,

This patch enables the performance monitoring unit found on the Armada 370, 375, 38x and XP, in order to gain hardware-assisted tracing using perf.

Due to the way the interrupts are implemented in these SoCs, it required some additions to the interrupt controller in order to unmask the PMU interrupts.

While doing so, we reworked the way the PPI are supported, in order to make the driver both easier to read and to extend.

This has been tested on an Armada XP and an Armada 385, and this serie depends on the patch "irqchip: armada: Fix chained per-cpu interrupts" sent previously.

Thanks!
Maxime

Changes from v1:
- Dropped the mask/unmask refactoring
- Rebased on top of the v2 of the chained PPI fix

Ezequiel Garcia (5):
irqchip: armada-370-xp: Initialize per cpu registers when CONFIG_SMP=N
irqchip: armada-370-xp: Introduce a is_percpu_irq() helper for
readability
ARM: mvebu: Enable Performance Monitor Unit on Armada 375 SoC
ARM: mvebu: Enable Performance Monitor Unit on Armada 380/385 SoC
ARM: mvebu: Enable perf support in mvebu_v7_defconfig

Maxime Ripard (2):
irqchip: armada-370-xp: Enable the PMU interrupts
ARM: mvebu: Enable Performance Monitor Unit on Armada XP/370 SoCs

Quoted 7 lines
 arch/arm/boot/dts/armada-370-xp.dtsi |  5 ++
 arch/arm/boot/dts/armada-375.dtsi    |  5 ++
 arch/arm/boot/dts/armada-38x.dtsi    |  5 ++
 arch/arm/configs/mvebu_v7_defconfig  |  1 +
 drivers/irqchip/irq-armada-370-xp.c  | 88 +++++++++++++++++++++++-------------
 5 files changed, 73 insertions(+), 31 deletions(-)

Now that patches 1-3 have been applied and are also in linux-next, I applied patches 4-6 to mvebu/dt and pacth 7 to mvebu/defconfig

I also checked that having only patches 4 to 7 without the 3 first ones didn't break the build or didn't make the kernel crash.

Thanks,

Gregory

Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Read the cover letter in its thread